MICRF011 tm QwikRadio Receiver/Data Demodulator Preliminary Information Features General Description Complete UHF receiver on a monolithic chip OOK (ON-OFF Keyed) Receiver IC for remote wireless applications, y Frequency range 300 to 440 MHz antenna-in, data-out monolithic device. All RF and IF tuning is accomplished automatically within the IC, which eliminates manual Typical range over 200 meters with monopole antenna Data rates to 2.5kbps (SWP), 10kbps y r Automatic tuning, no manual adjustment The MICRF011 is a functional and pin equivalent upgrade to the No Filters or Inductors required Low Operating Supply Current 2.4 mA Fully pin compatible with MICRF001 . In FIXED mode, the device functions like a conventionaland SWP , with an (internal) local oscillator fixed at ar Very low RF re-radiation at the antenna r transmit Direct CMOS logic interface to standard decoder be accurately controlled, generally with a crystal or SAW (Surface and microprocessor ICs . r Extremely low external part count In SWP mode, the MICRF0 Applications Garage Door/Gate Openers Security Systems . r Remote Fan/Light Control All post-detection (demodulator) data filtering is provided on the IMPORTANT: Items in bold type represent changes from . Bandwidths r the MICRF001 specification. Differences between the MICRF001 and -011 are identified in table 2, together with design considerations for using the -011 in present MICRF001 designs. Typical Operating Circuit 385.5 MHz, 1200 bps OOK RECEIVER Micrel Inc. USA tm MICRF011 QwikRadio Micrel Ordering Information Part Number Temperature Range Package -40 C to +85 C -40 C to +85 C Pin Configuration (DIP and SOIC) Pin Description Pin Number Pin Name Pin Function 1 SEL0 Programs desired Demodulator Filter Bandwidth. This pin in internally pulled-up to VDD. See Table 1. VSSRF This pin is the ground return for the RF section of the IC. The bypass capacitor connected from VDDRF to VSSRF should have the shortest possible lead length. For best performance, connect VSSRF to VSSBB at the power supply only (i.e., keep VSSBB currents from flowing through VSSRF return path). 4 ANT This is the receive RF input, internally ac-coupled. Connect this pin to the receive antenna. Input impedance is high (FET gate) with approximately 2pF of shunt (parasitic) capacitance. For applications Application Note 22, MICRF001 Theory of Operation.) 5 This pin is the positive supply input for the RF section of the IC. VDDBB and VDDRF should be connected directly at the IC pins. Connect a low ESL, low ESR decoupling capacitor from this pin to VSSRF, as short as possible. 6 VDDBB This pin is the positive supply input for the baseband section of the IC. VDDBB and VDDRF should be connected directly at the IC pins. 7 reference for the internal data slicing comparator. Treat this as a low-pass RC filter with source impedance of 118kohms . Note that variation in source resistance with filter selection no longer exists, as it does for the MICRF001. (See Application Note 22, MICRF001 Theory of Operation, section 6.4). A standard 20% X7R ceramic capacitor is generally sufficient. 8 Output data pin. CMOS level compatible. VSSBB This is the ground return for the baseband section of the IC. The bypass and output capacitors connected to VSSBB should have the shortest possible lead lengths. For best performance, connect VSSRF to VSSBB at the power supply only (i.e., keep VSSBB currents from flowing through VSSRF return path). receive AGC (Automatic Gain Control). The Decay/Attack time-constant (TC) ratio is nominally set as 10:1. Use of 0.47 F or greater is strongly recommended for best range performance. See Application Note 22, MICRF001 Theory of Operation for further information. SEL1 Programs desired Demodulator Filter Bandwidth. This pin in internally pulled-up to VDD. See Table 1. This is the timing reference for on-chip tuning and alignment. Connect either a ceramic resonator or crystal (mode dependent) between this pin and VSSBB, or drive the input with an AC coupled 0.5Vpp input clock. Use ceramic resonators without integral capacitors. Note that if operated in FIXED mode, a crystal must be used however in SWP mode, one may use either a crystal or ceramic resonator. See Application Note 22, MICRF001 Theory of Operation for details on frequency selection and accuracy. SWEN This logic pin controls the operating mode of the MICRF011. When SWEN = HIGH, the MICRF011 is in SWP mode. This is the normal (default) mode of the device. When SWEN = LOW, the device operates Application Note 22, MICRF001 Theory of Operation for details.) This pin is internally pulled-up to VDD. 2 December 1998b MICRF011 as a conventional single-conversion superheterodyne receiver. (See 14 REFOSC 13 12 Integrating capacitor for on-chip CAGC 11 9/10 DO (for REFOSC frequency ft=4.90MHz) This capacitor extracts the (DC) average value from the demodulated waveform, which becomes the CTH VDDRF the ANT pin and VSSRF to provide additional receive selectivity and input overload protection. (See located in high ambient noise environments, a fixed value band-pass network may be connected between 2/3 14-Pin SOIC MICRF011BM 14-Pin DIP MICRF011BN