SCH5027D-NW Super I/O with Temperature Sensing, Quiet Auto Fan and Glue Logic with PECI - Programmable Baud Rate Generator Product Features - Modem Control Circuitry General Features - 480 Address and 15 IRQ Options - 3.3 Volt Operation (SIO Block is 5 Volt Toler- Infrared Port ant) - Multiprotocol Infrared Interface - LPC Interface - IrDA 1.0 Compliant - Programmable Wake-up Event Interface - SHARP ASK IR - PC99, PC2001 Compliant - 480 Addresses, Up to 15 IRQ - ACPI 2.0 Compliant Multi-Mode Parallel Port with ChiProtect - Multiplexed Command, Address and Data - Standard Mode IBM PC/XT, PC/AT, and Bus PS/2 Compatible Bi-directional Parallel - Serial IRQ Interface Compatible with Serial- Port ized IRQ Support for PCI Systems - Enhanced Parallel Port (EPP) Compatible - - PME Interface EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) - ISA Plug-and-Play Compatible Register Set - IEEE 1284 Compliant Enhanced Capabilities - 25 General Purpose Input/Output Pins Port (ECP) - System Management Interrupt - ChiProtect Circuitry for Protection - AC Power Failure Recovery o - 960 Address, Up to 15 IRQ and Three DMA - Operating Temperature Range of 0 C to o Options +70 C Keyboard Controller Watchdog Timer - 8042 Software Compatible 2.88 MB Super I/O Floppy Disk Controller - 8 Bit Microcomputer - Licensed CMOS 765B Floppy Disk Controller - 2k Bytes of Program ROM - Software and Register Compatible with - 256 Bytes of Data RAM Microchip s Proprietary 82077AA Compatible - Four Open Drain Outputs Dedicated for Key- Core board/Mouse Interface - Supports One Floppy Drive - Asynchronous Access to Two Data Registers - Configurable Open Drain/Push-PullOutput and One Status Register Drivers - Supports Interrupt and Polling Access - Supports Vertical Recording Format - 8 Bit Counter Timer - 16-Byte Data FIFO - Port 92 Support - 100% IBM Compatibility - Fast Gate A20 and KRESET Outputs - Detects All Overrun and Underrun Conditions Motherboard GLUE Logic - Sophisticated Power Control Circuitry (PCC) Including Multiple Powerdown Modes for - IDE Reset Output Reduced Power Consumption - (4) Buffered PCI Reset Outputs with software - DMA Enable Logic controlled reset capability - default transpar- - Data Rate and Drive Control Registers ent - 480 Address, Up to Eight IRQ and Three - Front Panel Reset Debouncing and Power DMA Options Good Signal Generation - Support 3 Mode FDD - Power Supply Turn On Circuitry with Support - Enhanced Digital Data Separator for power button on PS/2 Keyboard - 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 - Resume Reset Signal Generation Kbps Data Rates - SMBus Isolation Circuitry (2 sets external - Programmable Precompensation Modes and 1 set internal for Hardware Monitoring Block) Serial Ports - SMBus 2.0 compliant interface for Hardware - Two Full Function Serial Ports Monitoring - High Speed NS16C550A Compatible UARTs - LED Control (2) with Send/Receive 16-Byte FIFOs - Supports 230k and 460k Baud 2014 Microchip Technology Inc. DS00001782A-page 1SCH5027D-NW Fan Control tem Management Bus (SMBus). The same interrupt event reported on the nHWM INT pin also creates - 5 PWM (Pulse width Modulation) Outputs PME wakeup events and speaker alarm annunciation. - Two and three piece linear fan function options The SCH5027D-NW also allows for a two or three - Low frequency and high frequency PWM piece linear fan function. support The Motherboard Glue logic includes various power - 6 Fan Tachometer Inputs management and system logic including generation of - Programmable automatic fan control based nRSMRST, SMBus buffers, and buffered PCI reset out- on temperature puts. - Interrupt Pin for out-of-limit Fantach Events The SCH5027D-NW incorporates complete legacy - Fantach events generate PMEs Super I/O functionality including an 8042 based key- Temperature Monitor board and mouse controller, an IEEE 1284, EPP, and - Monitoring of Two Remote Thermal Diodes ECP compatible parallel port, one serial port that is - Processor temperature monitoring by PECI 16C550A UART compatible, one IrDA 1.0 infrared - Internal Ambient Temperature Measurement ports, and a floppy disk controller with Microchip s true - Limit Comparison of all Monitored Values CMOS 765B core and enhanced digital data separator, - Interrupt Pin for out-of-limit Temperature Indi- The true CMOS 765B core provides 100% compatibility cation with IBM PC/XT and PC/AT architectures and is soft- - Thermal events generate PMEs ware and register compatible with Microchip s propri- - Configurable offset for internal or external etary 82077AA core. System related functionality, temperature channels. which offers flexibility to the system designer, General Voltage Monitor Purpose I/O control functions, control of two LED s, and - Monitor Power supplies (2 at 1.125V, one at fan control using fan tachometer inputs and pulse width 5V, one each for Vccp, Vbat, VTR, and VCC) modulator (PWM) outputs - Limit Comparison of all Monitored Values The SCH5027D-NW is ACPI 1.0/2.0 compatible and - Interrupt Pin for out-of-limit Voltage Indication therefore supports multiple low power-down modes. It - Voltage events generate PMEs incorporates sophisticated power control circuitry Security Features (PCC), which includes support for keyboard and mouse - Security Key Register (32 byte) for Device wake-up events. Authentication The SCH5027D-NW supports the ISA Plug-and-Play 3 VID (Voltage Identification) Inputs Standard register set (Version 1.0a). The I/O Address, Phoenix Keyboard BIOS ROM DMA Channel and hardware IRQ of each logical device 128-Pin QFP RoHS Compliant Package in the SCH5027D-NW may be reprogrammed through the internal configuration registers. There are up to 480 (960 - Parallel Port) I/O address location options, a Description Serialized IRQ interface, and Three DMA channels. The SCH5027D-NW is a 3.3V (Super I/O Block is 5V tolerant) PC99/PC2001 compliant Super I/O controller with an LPC interface. SCH5027D-NW also includes Hardware Monitoring capabilities, enhanced Security features, Power Control logic and Motherboard Glue logic. The SCH5027D-NW s hardware monitoring capability includes temperature, voltage and fan speed monitor- ing. It has the ability to alert the system to out-of-limit conditions and automatically control the speeds of mul- tiple fans. There are four analog inputs for monitoring external voltages, two at 1.125V, one at 5V and one at 2.25V for Vccp (core processor voltage). There is also internal monitoring of the SIO s VCC, VTR, and Vbat power supplies. The SCH5027D-NW includes support for monitoring two external temperatures via thermal diode inputs and an internal sensor for measuring ambient temperature. The nHWM INT pin is imple- mented to indicate out-of-limit temperature, voltage, and FANTACH conditions. The hardware monitoring block of the SCH5027D-NW is accessible via the Sys- DS00001782A-page 2 2014 Microchip Technology Inc.