8 Mbit (x16) Multi-Purpose Flash SST39WF800B A Microchip Technology Company Data Sheet The SST39WF800B is a 512K x16 CMOS Multi-Purpose Flash (MPF) manufac- tured with proprietary, high-performance CMOS SuperFlash technology. The split- gate cell design and thick-oxide tunneling injector attain better reliability and man- ufacturability compared to alternate approaches. The SST39WF800B writes (Pro- gram or Erase) with a 1.65-1.95V power supply. This device conforms to JEDEC standard pin assignments for x16 memories Features Organized as 512K x16 Fast Erase and Word-Program Sector-Erase Time: 36 ms (typical) Single Voltage Read and Write Operations Block-Erase Time: 36 ms (typical) Chip-Erase Time: 140 ms (typical) 1.65-1.95V Word-Program Time: 28 s (typical) Superior Reliability Automatic Write Timing Endurance: 100,000 Cycles (typical) Internal V Generation Greater than 100 years Data Retention PP End-of-Write Detection Low Power Consumption (typical values at 5 MHz) Toggle Bit Active Current: 5 mA (typical) Data Polling Standby Current: 5 A (typical) CMOS I/O Compatibility Sector-Erase Capability Uniform 2 KWord sectors JEDEC Standard Block-Erase Capability Flash EEPROM Pinouts and command sets Uniform 32 KWord blocks Packages Available Fast Read Access Time 48-ball TFBGA (6mm x 8mm) 48-ball WFBGA (4mm x 6mm) Micro-Package 70ns 48-ball XFLGA (5mm x 6mm) Micro-Package 48-ball XFLGA (4mm x 6mm) Micro-Package Latched Address and Data AlldevicesareRoHScompliant 2011 Silicon Storage Technology, Inc. www.microchip.com DS25031A 08/118 Mbit (x16) Multi-Purpose Flash SST39WF800B A Microchip Technology Company Data Sheet Product Description The SST39WF800B is a 512K x16 CMOS Multi-Purpose Flash (MPF) manufactured with SST proprie- tary, high-performance CMOS SuperFlash technology. The split-gate cell design and thick-oxide tun- neling injector attain better reliability and manufacturability compared to alternate approaches. The SST39WF800B writes (Program or Erase) with a 1.65-1.95V power supply. This device conforms to JEDEC standard pin assignments for x16 memories. The SST39WF800B features high-performance Word-Programming which provides a typical Word- Program time of 28 sec. It uses Toggle Bit or Data Polling to detect the completion of the Program or Erase operation. On-chip hardware and software data protection schemes protects against inadvertent writes. Designed, manufactured, and tested for a wide spectrum of applications, the SST39WF800B is offered with a guaranteed typical endurance of 100,000 cycles. Data retention is rated at greater than 100 years. The SST39WF800B is suited for applications that require convenient and economical updating of pro- gram, configuration, or data memory. It significantly improves performance and reliability of all system applications while lowering power consumption. It inherently uses less energy during Erase and Pro- gram than alternative flash technologies. When programming a flash device, the total energy con- sumed is a function of the applied voltage, current, and time of application. For any given voltage range, SuperFlash technology uses less current to program and has a shorter erase time therefore, the total energy consumed during any Erase or Program operation is less than alternative flash tech- nologies. These devices also improve flexibility while lowering the cost for program, data, and configu- ration storage applications. SuperFlash technology provides fixed Erase and Program times independent of the number of Erase/ Program cycles that have occurred. Consequently, the system software or hardware does not have to be modified or de-rated as is necessary with alternative flash technologies, whose Erase and Program times increase with accumulated Erase/Program cycles. To meet surface mount requirements, the SST39WF800B is offered in 48-ball TFBGA, 48-ball WFBGA, and a 48-ball XFLGA packages. See Figures 2 and 3 for pin assignments and Table 1 for pin descriptions. 2011 Silicon Storage Technology, Inc. DS25031A 08/11 2