ECL Pro 3.3V/5V PECL/ECL SY100EP57V Micrel, Inc. ECL Pro 3GHz DIFFERENTIAL SY100EP57V 4:1 MULTIPLEXER FEATURES Fully differential 4:1 PECL/ECL multiplexer Guaranteed AC-parameters over temp/voltage: ECL Pro > 3GHz Fmax (toggle) < 220ps rise/fall Time DESCRIPTION < 520ps propagation delay (D-to-Q) Flexible power supply: 3.0V to 5.5V The SY100EP57V is a high-speed, low-skew, fully differential PECL/ECL 4:1 multiplexer in a 20-pin TSSOP Wide operating temp range: 40C to +85C package. This device is a pin-for-pin, plug-in replacement V reference for AC-coupled and single-ended BB to the MC10/100EP57DT. The signal-path inputs (D0:D3) applications accept differential signals as low as 150mVpk-pk. All I/O 100k PECL/ECL compatible logic pins are 100K EP PECL/ECL logic compatible. Available in 20-pin TSSOP package ACperformance is guaranteed over the industrial 40C to +85C temperature range and 3.0V to 5.5V supply voltage range. This device will operate in PECL/LVPECL or ECL/ LVECL mode. The SY100EP57 propagation delay is less than 520ps, and the Select-to-valid output delay is less than 575ps over temperature and voltage. For clock applications, the high-speed design combined with an extremely fast rise/fall time of less than 220ps produces a toggle frequency as high as 3GHz (400mVpk-pk swing). Two V output reference pins (approx equal to V 1.4V) BB CC are available for ACcoupled or single-ended applications. CROSS REFERENCE TABLE The SY100EP57V is part of Micrels high-speed, Precision Edge timing and distribution family. For applications that Micrel Semiconductor ON Semiconductor require a different I/O combination, consult the Micrel website at www.micrel.com, and choose from a comprehensive SY100EP57VK4I MC100EP57DT product line of high-speed, low skew fanout buffers, SY100EP57VK4ITR MC100EP57DTR2 translators, and clock dividers. ECL Pro is a trademark of Micrel, Inc. Rev.: D Amendment: /0 M9999-120505 1 Issue Date: December 2005 hbwhelp micrel.com or (408) 955-1690ECL Pro SY100EP57V Micrel, Inc. PACKAGE/ORDERING INFORMATION (1) Ordering Information VCC VCC 1 20 Package Operating Package Lead D0 2 19 SEL1 Part Number Type Range Marking Finish 18 SEL0 /D0 3 SY100EP57VK4I K4-20-1 Industrial XEP57V Sn-Pb 17 VCC D1 4 (2) SY100EP57VK4ITR K4-20-1 Industrial XEP57V Sn-Pb /D1 16 Q 5 (3) SY100EP57VK4G K4-20-1 Industrial XEP57V with Pb-Free 4:1 15 /Q D2 6 Pb-Free bar-line indicator NiPdAu /D2 7 14 VCC (2, 3) K4-20-1 Industrial XEP57V with Pb-Free SY100EP57VK4GTR 13 VBB1 Pb-Free bar-line indicator NiPdAu D3 8 VBB2 /D3 9 12 Notes: 1. Contact factory for die availability. Dice are guaranteed at T = 25C, DC Electricals only. VEE VEE 10 11 A 2. Tape and Reel. 3. Pb-Free package is recommended for new designs. 20-Pin TSSOP (K4-20-1) PIN DESCRIPTION Pin Pin Number Function D0: D3 2, 4, 6, 8 Input Channels 0-3 PECL/ECL differential signal inputs. Multiplexing of these 4 differential inputs /D0: /D3 3, 5, 7, 9 is controlled by SEL0, SEL1. The signal inputs include internal 75k pull-down resistors. Default condition is LOW when left floating. The input signal should be terminated externally. See Termination section VEE 10, 11 Negative Power Supply: For PECL/LVPECL applications, connect to Ground. Both V pins must EE be connected together, externally on the PCB, for proper operation. VBB1, VBB2 13, 12 Reference output voltage. This reference is typically used to bias the unused inverting input for single-ended input applications, or as the termination point for ACcoupled differential input applications. V reference value is approximately V 1.4V, and tracks V 1:1. Maximum sink/ BB CC CC source capability for each V reference pin is 0.50mA. For single ended PECL inputs, connect to BB the unused input through a 50 resistor. Decouple the V pin with a 0.01F capacitor. For PECL/ BB LVPECL inputs, the decoupling capacitor is connected to V , since PECL signals are referenced CC to V . Leave floating if not used. CC /Q, Q 15, 16 100KEP PECL/ECL compatible differential output. PECL/ECL termination is with a 50 resistor to V 2V. Unused single-ended outputs must have a balanced load. For ACcoupled CC applications, the output stage emitter follower must have a DC current path to ground. See Termination section. SEL0, SEL1 18, 19 100KEP PECL/ECL compatible 4:1 MUX select control. See MUX Select Truth Table. Each pin includes an internal 75k pull-down resistor. Default condition when left floating is LOW. VCC 1, 14, 17, 20 Positive Power Supply. All V pins must be connected to the same power supply externally. CC Bypass with 0.1F//0.01F low ESR capacitors. MUX SELECT TRUTH TABLE SEL1 SEL0 DATA OUT L L D0, /D0 L H D1, /D1 H L D2, /D2 H H D3, /D3 M9999-120505 2 hbwhelp micrel.com or (408) 955-1690