NOT RECOMMENDED FOR NEW DESIGNS UNIVERSAL SY100S370 Micrel, Inc. SY100S370 DEMULTIPLEXER/ DECODER FEATURES DESCRIPTION Max. propagation delay of 1200ps The SY100S370 is a universal demultiplexer/decoder that can be used as either a dual 1-of-4 decoder or as a IEE min. of 92mA single 1-of-8 decoder and is designed for use in high- Industry standard 100K ECL levels performance ECL systems. The Mode control (M) input Extended supply voltage option: determines the function. In the dual 1-of-4 mode, each 4- VEE = 4.2V to 5.5V input group has a pair of active-LOW Enable (E) inputs. Voltage and temperature compensation for improved The Enable pins are assigned such that in the single 1-of- noise immunity 8 mode they can be tied together in pairs to result in two active-LOW Enable inputs. E1a will be tied to E1b and E2a Internal 75k input pull-down resistors to E2b. 60% faster than National or Signetics The auxiliary inputs (Hn) are used to determine whether Approximately 40% lower power than Fairchild the outputs are active-HIGH or active-LOW. The address Function and pinout compatible with Fairchild F100K inputs for the dual 1-of-4 mode are A0a, A1a, A0b. A2a is unused. In the 1-of-8 mode, the address inputs are A0a, Available in 28-pin PLCC packages A1a, A2a. The inputs on the device have 75k pull-down resistors. PIN NAMES Pin Function Ana, Anb Address Inputs (n = 0,1,2) Ena, Enb Enable Inputs (n = 1,2) M Mode Control Input Ha Z0 Z3 (Z0a Z3a) Polarity Select Input Hb Z4 Z7 (Z0b Z3b) Polarity Select Input Hc Common Polarity Select Input Z0 Z7 Single 1-of-8 Data Outputs Zna, Znb Dual 1-of-4 Data Outputs (n = 1...4) VEES VEE Substrate CCA VCCO for ECL Outputs V Rev.: I Amendment: /0 M9999-042307 1 Issue Date: April 2007 hbwhelp micrel.com or (408) 955-1690SY100S370 Micrel, Inc. PACKAGE/ORDERING INFORMATION Ordering Information Package Operating Package Lead Part Number Type Range Marking Finish 11 10 9 8 7 6 5 SY100S370JC J28-1 Commercial SY100S370JC Sn-Pb E1a 12 4 Z0a (Z0) (1) E1b 13 3 Z3a (Z3) SY100S370JCTR J28-1 Commercial SY100S370JC Sn-Pb VEE 14 2 VCCA Top View (2) SY100S370JZ J28-1 Commercial SY100S370JZ with Matte-Sn VEES 15 PLCC 1 VCC J28-1 Pb-Free bar-line indicator E2b 16 28 VCC (1, 2) E2a 17 27 Z1b (Z5) SY100S370JZTR J28-1 Commercial SY100S370JZ with Matte-Sn 18 26 Z2b (Z6) Ha Pb-Free bar-line indicator 19 20 21 22 23 24 25 Notes: 1. Tape and Reel. 2. Pb-Free package is recommended for new designs. 28-Pin PLCC (J28-1) (1) TRUTH TABLES Dual 1-of-4 Mode (M = A2a = Hc = LOW) Active HIGH Outputs Active LOW Outputs Inputs (Ha and Hb Inputs HIGH) (Ha and Hb Inputs LOW) E1a,E1b E2a,E2b A1a,A1b A0a,A0b Z0a,Z0b Z1a,Z1b Z2a,Z2b Z3a,Z3b Z0a,Z0b Z1a,Z1b Z2a,Z2b Z3a,Z3b H X X X LLLL H H H H X H X X LLLL H H H H LLL L H L L L L H H H L L L H L H L LH LH H L L HL L L HL H H L H L L H H L L L HH HH L Single 1-of-8 Mode (M = HIGH A0b = A1b = Ha = Hb = LOW) Inputs Active HIGH Outputs* (Hc Input HIGH) E1 E2 A2a A1a A0a Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z7 H X X X X L L LLLLLL X H X X X L L LLLLLL L L L L L H L LLLLLL L L L L H L H LLLLLL L L L H LL L H LLLLL L L L H H L L L H LLLL LL H L L LLL L H L L L LL H L H LLL L L H L L L L H H LL L LLLL H L L L H H H L L LLLLL H Note: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don t Care * for Hc = LOW, output states are complemented E1 = E1a and E1b wired E2 = E2a and E2b wired M9999-042307 2 hbwhelp micrel.com or (408) 955-1690 Hc A2a Hb M A1a A0b VEES VEES A0a A1b Z3b (Z7) Z1a (Z1) Z0b (Z4) Z2a (Z2)