MT41K512M8DA-107 XIT:P Micron

4Gb: x4, x8, x16 DDR3L SDRAM Addendum Description DDR3L SDRAM Data Sheet Addendum MT41K1G4 128 Meg x 4 x 8 banks MT41K512M8 64 Meg x 8 x 8 banks MT41K256M16 32 Meg x 16 x 8 banks Self refresh temperature (SRT) Description Automatic self refresh (ASR) DDR3L SDRAM (1.35V) is a low voltage version of the Write leveling DDR3 (1.5V) SDRAM. Refer to DDR3 (1.5V) SDRAM Multipurpose register (Die Rev.: E) data sheet specifications when running in Output driver calibration 1.5V compatible mode. Options Marking Features Configuration V = V = 1.35V (1.2831.45V) DD DDQ 1 Gig x 4 1G4 Backward compatible to V = V = 1.5V 0.075V DD DDQ 512 Meg x 8 512M8 Supports DDR3L devices to be backward com- 256 Meg x 16 256M16 patible in 1.5V applications FBGA package (Pb-free) x4, x8 Differential bidirectional data strobe 78-ball (8mm x 10.5mm) Rev. P DA 8n-bit prefetch architecture FBGA package (Pb-free) x16 Differential clock inputs (CK, CK ) 96-ball (8mm x 14mm) Rev. P TW 8 internal banks Timing cycle time Nominal and dynamic on-die termination (ODT) 938ps CL = 14 (DDR3-2133) -093 for data, strobe, and mask signals 1.07ns CL = 13 (DDR3-1866) -107 Programmable CAS (READ) latency (CL) 1.25ns CL = 11 (DDR3-1600) -125 Programmable posted CAS additive latency (AL) Special Options Programmable CAS (WRITE) latency (CWL) Premium Lifecycle Product (PLP) X Fixed burst length (BL) of 8 and burst chop (BC) of 4 Operating temperature (via the mode register set MRS ) Commercial (0C T +95C) None C Selectable BC4 or BL8 on-the-fly (OTF) Industrial (40C T +95C) IT C Self refresh mode Revision P T of 0C to +95C C 64ms, 8192-cycle refresh at 0C to +85C 32ms at +85C to +95C Table 1: Key Timing Parameters t t t t Speed Grade Data Rate (MT/s) Target RCD- RP-CL RCD (ns) RP (ns) CL (ns) 1, 2 -093 2133 14-14-14 13.09 13.09 13.09 1 -107 1866 13-13-13 13.91 13.91 13.91 -125 1600 11-11-11 13.75 13.75 13.75 1. Backward compatible to 1600, CL = 11 (-125). Notes: 2. Backward compatible to 1866, CL = 13 (-107). PDF: X26P4QTWDSPK-13-10329 Micron Technology, Inc. reserves the right to change products or specifications without notice. 1 4gb 1 35v ddr3l xit addendum.pdf - Rev. A 02/16 EN 2016 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice.4Gb: x4, x8, x16 DDR3L SDRAM Addendum Description Table 2: Addressing Parameter 1 Gig x 4 512 Meg x 8 256 Meg x 16 Configuration 128 Meg x 4 x 8 banks 64 Meg x 8 x 8 banks 32 Meg x 16 x 8 banks Refresh count 8K 8K 8K Row address 64K (A 15:0 ) 64K (A 15:0 ) 32K (A 14:0 ) Bank address 8 (BA 2:0 ) 8 (BA 2:0 ) 8 (BA 2:0 ) Column address 2K (A 11, 9:0 ) 1K (A 9:0 ) 1K (A 9:0 ) Page size 1KB 1KB 2KB Figure 1: DDR3L Part Numbers Example Part Number: MT41K256M16TW-107 XIT:P - : Configuration Package Speed Revision MT41K :P Revision Configuration Mark 1 Gig x 4 1G4 Temperature Mark 512 Meg x 8 512M8 256 Meg x 16 256M16 Commercial None Industrial temperature IT Package Rev. Mark Special Options 78-ball 8mm x 10.5mm FBGA P DA Mark 96-ball 8mm x 14mm FBGA P TW X Premium Lifecycle Product (PLP) Mark Speed Grade t CK = .938ns, CL = 14 -093 t -107 CK = 1.07ns, CL = 13 t -125 CK = 1.25ns, CL = 11 1. Not all options listed can be combined to define an offered product. Use the part catalog search on Note: