512Mb, Multiple I/O Serial Flash Memory Features Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q512A Write protection Features Software write protection applicable to every Stacked device (two 256Mb die) 64KB sector via volatile lock bit SPI-compatible serial bus interface Hardware write protection: protected area size Double transfer rate (DTR) mode defined by five nonvolatile bits (BP0, BP1, BP2, 2.73.6V single supply voltage BP3, and TB) 108 MHz (MAX) clock frequency supported for all Additional smart protections, available upon re- protocols in single transfer rate (STR) mode quest 54 MHz (MAX) clock frequency supported for all Electronic signature protocols in DTR mode JEDEC-standard 2-byte signature (BA20h) Dual/quad I/O instruction provides increased Unique ID code (UID): 17 read-only bytes, throughput up to 54 MB/s including: Two additional extended device ID Supported protocols bytes to identify device factory options and cus- Extended SPI, dual I/O, and quad I/O tomized factory data (14 bytes) DTR mode supported on all Minimum 100,000 ERASE cycles per sector Execute-in-place (XIP) mode for all three protocols More than 20 years data retention Configurable via volatile or nonvolatile registers Packages JEDEC-standard, all RoHS-compliant Enables memory to work in XIP mode directly af- V-PDFN-8/8mm x 6mm (also known as SON, ter power-on DFPN, MLP, MLF) PROGRAM/ERASE SUSPEND operations SOP2-16/300mils (also known as SO16W, SO16- Available protocols Wide, SOIC-16) Available READ operations T-PBGA-24b05/6mm x 8mm (also known as Quad or dual output fast read TBGA24) Quad or dual I/O fast read Flexible to fit application 1. Part numbers: N25Q512A83G1240x, Note: Configurable number of dummy cycles N25Q512A83GSF40x, N25Q512A83GSFA0x,N25Q512A83G12A0x Output buffer configurable and N25Q512A83G12H0x see table 43 for x Software reset 1 last digit details Additional reset pin for selected part numbers 3-byte and 4-byte addressability mode supported 64-byte, user-lockable, one-time programmable (OTP) dedicated area Erase capability Subsector erase 4KB uniform granularity blocks Sector erase 64KB uniform granularity blocks Single die erase 09005aef84752721 Micron Technology, Inc. reserves the right to change products or specifications without notice. 1 n25q 512mb 1ce 3V 65nm.pdf - Rev. V 06/18 EN 2011 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice.512Mb, Multiple I/O Serial Flash Memory Features Contents Important Notes and Warnings ......................................................................................................................... 6 Device Description ........................................................................................................................................... 7 Features ....................................................................................................................................................... 7 3-Byte Address and 4-Byte Address Modes ..................................................................................................... 7 Operating Protocols ...................................................................................................................................... 7 XIP Mode ..................................................................................................................................................... 8 Device Configurability .................................................................................................................................. 8 Signal Assignments ........................................................................................................................................... 9 Signal Descriptions ......................................................................................................................................... 11 Memory Organization .................................................................................................................................... 13 Memory Configuration and Block Diagram .................................................................................................. 13 Memory Map 512Mb Density ....................................................................................................................... 14 Device Protection ........................................................................................................................................... 15 Serial Peripheral Interface Modes .................................................................................................................... 18 SPI Protocols .................................................................................................................................................. 20 Nonvolatile and Volatile Registers ................................................................................................................... 21 Status Register ............................................................................................................................................ 22 Nonvolatile and Volatile Configuration Registers .......................................................................................... 22 Extended Address Register .......................................................................................................................... 27 Enhanced Volatile Configuration Register .................................................................................................... 28 Flag Status Register ..................................................................................................................................... 29 Command Definitions .................................................................................................................................... 31 READ REGISTER and WRITE REGISTER Operations ........................................................................................ 35 READ STATUS REGISTER or FLAG STATUS REGISTER Command ................................................................ 35 READ NONVOLATILE CONFIGURATION REGISTER Command ................................................................... 36 READ VOLATILE or ENHANCED VOLATILE CONFIGURATION REGISTER Command .................................. 36 READ EXTENDED ADDRESS REGISTER Command ..................................................................................... 37 WRITE STATUS REGISTER Command ......................................................................................................... 37 WRITE NONVOLATILE CONFIGURATION REGISTER Command ................................................................. 38 WRITE VOLATILE or ENHANCED VOLATILE CONFIGURATION REGISTER Command ................................. 38 WRITE EXTENDED ADDRESS REGISTER Command ................................................................................... 39 READ LOCK REGISTER Command .............................................................................................................. 39 WRITE LOCK REGISTER Command ............................................................................................................ 41 CLEAR FLAG STATUS REGISTER Command ................................................................................................ 42 READ IDENTIFICATION Operations ............................................................................................................... 43 READ ID and MULTIPLE I/O READ ID Commands ...................................................................................... 43 READ SERIAL FLASH DISCOVERY PARAMETER Command ......................................................................... 44 READ MEMORY Operations ............................................................................................................................ 48 3-Byte Address ........................................................................................................................................... 48 4-Byte Address ........................................................................................................................................... 49 READ MEMORY Operations Timing Single Transfer Rate ........................................................................... 51 READ MEMORY Operations Timing Double Transfer Rate ......................................................................... 55 PROGRAM Operations .................................................................................................................................... 58 WRITE Operations .......................................................................................................................................... 63 WRITE ENABLE Command ......................................................................................................................... 63 WRITE DISABLE Command ........................................................................................................................ 63 ERASE Operations .......................................................................................................................................... 65 SUBSECTOR ERASE Command ................................................................................................................... 65 SECTOR ERASE Command ......................................................................................................................... 65 DIE ERASE Command ................................................................................................................................ 66 09005aef84752721 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2 n25q 512mb 1ce 3V 65nm.pdf - Rev. V 06/18 EN 2011 Micron Technology, Inc. All rights reserved.