PHT6NQ10T Nexperia

Philips Semiconductors Product specification N-channel TrenchMOS transistor PHT6NQ10T FEATURES SYMBOL QUICK REFERENCE DATA Trench technology d Low on-state resistance V = 100 V DSS Fast switching Low thermal resistance I = 6.5 A D g R 90 m DS(ON) s GENERAL DESCRIPTION PINNING SOT223 N-channel enhancement mode PIN DESCRIPTION 4 field-effect transistor in a plastic envelope using trench 1 gate technology. 2 drain Applications:- Motor and relay drivers 3 source d.c. to d.c. converters 4 drain (tab) 1 23 The PHT6NQ10T is supplied in the SOT223 surface mounting package. LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V Drain-source voltage T = 25 C to 150C - 100 V DSS j V Drain-gate voltage T = 25 C to 150C R = 20 k - 100 V DGR j GS V Gate-source voltage - 20 V GS I Continuous drain current (dc) T = 25 C - 6.5 A D sp T = 25 C - 3 A amb I Continuous drain current (dc) T = 100 C - 4.1 A D sp T = 100 C - 1.9 A amb I Pulsed drain current - 26 A DM P Total power dissipation T = 25 C - 8.3 W D sp T = 25 C - 1.8 W amb T, T Operating junction and - 65 150 C j stg storage temperature THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT R Thermal resistance junction to surface mounted, FR4 12 15 K/W th j-sp solder point board R Thermal resistance junction to surface mounted, FR4 70 - K/W th j-amb ambient board August 1999 1 Rev 1.000Philips Semiconductors Product specification N-channel TrenchMOS transistor PHT6NQ10T ELECTRICAL CHARACTERISTICS T= 25C unless otherwise specified j SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V Drain-source breakdown V = 0 V I = 0.25 mA 100 - - V (BR)DSS GS D voltage T = -55C 89 - - V j V Gate threshold voltage V = V I = 1 mA 2 3 4 V GS(TO) DS GS D T = 150C 1.2 - - V j T = -55C - 6 V j R Drain-source on-state V = 10 V I = 3 A - 57 90 m DS(ON) GS D resistance T = 150C - - 216 m j I Gate source leakage current V = 10 V V = 0 V - 10 100 nA GSS GS DS I Zero gate voltage drain V = 100 V V = 0 V - 0.05 10 A DSS DS GS current T = 150C - - 500 A j Q Total gate charge I = 6 A V = 80 V V = 10 V - 21 - nC g(tot) D DD GS Q Gate-source charge - 2.5 - nC gs Q Gate-drain (Miller) charge - 8.2 - nC gd t Turn-on delay time V = 50 V R = 8.2 -6-ns d on DD D t Turn-on rise time V = 10 V R = 5.6 -15 - ns r GS G t Turn-off delay time Resistive load - 20 - ns d off t Turn-off fall time - 10 - ns f L Internal drain inductance Measured tab to centre of die - 2.5 - nH d L Internal source inductance Measured from source lead to source - 5 - nH s bond pad C Input capacitance V = 0 V V = 25 V f = 1 MHz - 633 - pF iss GS DS C Output capacitance - 103 - pF oss C Feedback capacitance - 61 - pF rss REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS T = 25C unless otherwise specified j SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT I Continuous source current T = 25 C - - 5.5 A S sp (body diode) I Pulsed source current (body - - 26 A SM diode) V Diode forward voltage I = 6 A V = 0 V - 0.8 1.2 V SD F GS t Reverse recovery time I = 6 A -dI /dt = 100 A/s - 55 - ns rr F F Q Reverse recovery charge V = 0 V V = 25 V - 135 - nC rr GS R August 1999 2 Rev 1.000