GTL2012DP,118 NXP

GTL2012 2-bit LVTTL to GTL transceiver Rev. 01 9 August 2007 Product data sheet 1. General description The GTL2012 is a 2-bit translating transceiver designed for 3.3 V system interface with a GTL- /GTL/GTL+ bus. The direction pin (DIR) allows the part to function as either a GTL-to-LVTTL sampling receiver or as an LVTTL-to-GTL interface. The GTL2012 LVTTL inputs (only) are tolerant up to 5.5 V allowing direct access to TTL or 5 V CMOS inputs. 2. Features n Operates as a 2-bit GTL- /GTL/GTL+ sampling receiver or as an LVTTL to GTL- /GTL/GTL+ driver n 3.0 V to 3.6 V operation with 5 V tolerant LVTTL input n GTL input and output 3.6 V tolerant n V adjustable from 0.5 V to 0.5V ref CC n Partial power-down permitted n Latch-up protection exceeds 500 mA per JESD78 n ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-CC101 n Package offered: TSSOP8 (MSOP8) and VSSOP8 3. Quick reference data Table 1. Quick reference data Recommended operating conditions T =25 C amb 1 Symbol Parameter Conditions Min Typ Max Unit C input capacitance control inputs V = 3.0 V or 0 V - 2 2.5 pF i I C input/output capacitance A port V = 3.0 V or 0 V - 4.6 6 pF io O B port V =V or 0 V - 3.4 4.3 pF O TT GTL V = 0.8 V V = 1.2 V ref TT t LOW-to-HIGH propagation delay An to Bn see Figure 4 - 2.8 5 ns PLH t HIGH-to-LOW propagation delay An to Bn see Figure 4 - 3.4 7 ns PHL t LOW-to-HIGH propagation delay Bn to An see Figure 5 - 5.2 8 ns PLH t HIGH-to-LOW propagation delay Bn to An see Figure 5 - 4.9 7 ns PHL 1 All typical values are measured at V = 3.3 V and T =25 C. CC ambGTL2012 NXP Semiconductors 2-bit LVTTL to GTL transceiver 4. Ordering information Table 2. Ordering information T = - 40 C to +85 C amb Type number Topside mark Package Name Description Version 1 GTL2012DP 012P TSSOP8 plastic thin shrink small outline package 8 leads SOT505-1 body width 3 mm GTL2012DC 012C VSSOP8 plastic very thin shrink small outline package 8 leads SOT765-1 body width 2.3 mm 1 Also known as MSOP8. 5. Functional diagram GTL2012 & B0 A0 & B1 A1 002aab605 VREF DIR Fig 1. Logic diagram of GTL2012 GTL2012 1 NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 9 August 2007 2 of 14