Document Number: IMX8QMAEC NXP Semiconductors Rev. 2, 05/2021 Data Sheet: Technical Data MIMX8QMnAVUxxAx i.MX 8QuadMax Automotive and Infotainment Package Information Applications Processors 29 x 29 mm package case outline Ordering Information See Table 2 on page 5 1 Introduction 1 1 Introduction 1.1 Ordering Information 5 1.2 System Controller Firmware (SCFW) Requirements5 The i.MX 8 Family consists of two processors: 1.3 Related resources 5 2 Architectural Overview . 5 i.MX 8QuadMax and 8QuadPlus. This data sheet covers 2.1 Block Diagram . 6 the i.MX 8QuadMax processor, which is composed of 3 Modules List . 7 3.1 Special Signal Considerations 13 eight cores (two Arm Cortex -A72, four Arm 3.2 Recommended Connections for Unused Interfaces13 Cortex -A53, and two Arm Cortex -M4F), dual 32-bit 4 Electrical characteristics . 14 GPU subsystems, 4K H.265 capable VPU, and dual 4.1 Chip-level conditions . 14 4.2 Power supplies requirements and restrictions 27 failover-ready display controllers. This processor 4.3 PLL electrical characteristics . 30 supports a single 4K display (with multiple display 4.4 On-chip oscillators . 34 4.5 I/O DC Parameters 37 output options, including MIPI-DSI, HDMI, eDP/DP, 4.6 I/O AC Parameters 43 and LVDS), or multiple smaller displays. Memory 4.7 Output Buffer Impedance Parameters 46 interfaces supporting LPDDR4, Quad SPI/Octal SPI 4.8 System Modules Timing 50 4.9 General-Purpose Media Interface (GPMI) Timing. 54 (FlexSPI), eMMC 5.1, RAW NAND, SD 3.0, and a wide 4.10 External Peripheral Interface Parameters . 63 range of peripheral I/Os such as PCIe 3.0, provide wide 4.11 Analog-to-digital converter (ADC) 112 5 Boot mode configuration 116 flexibility. Advanced multicore audio processing is 5.1 Boot mode configuration inputs 116 supported by the Arm cores and a high performance 5.2 Boot devices interfaces allocation 116 Tensilica HiFi 4 DSP for pre- and post-audio 6 Package information and contact assignments 118 6.1 FCPBGA, 29 x 29 mm, 0.75 mm pitch 118 processing as well as voice recognition. 7 Release Notes . 145 NXP reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. 2018-2021 NXP B.V.Introduction The i.MX 8QuadMax processor offers numerous advanced features as shown in this table. Table 1. i.MX 8QuadMax advanced features Function Feature Multicore architecture provides AArch64 for 64-bit support and new architectural features 4 Cortex-A53, 2 Cortex-A72 cores, AArch32 for full backward compatibility with ARMv7 and 2 Cortex-M4F cores Cortex-A72 and Cortex-A53 cores support ARM virtualization extensions. sMMU provides address virtualization to all subsystems. Cortex-M4F cores for real-time applications Graphics Processing Unit (GPU) 16 Vec4 shaders with 64 execution units. Split GPU architecture allows for dual independent 8-Vec4 shader GPUs or a combined 16-Vec4 shader GPU. Supports OpenGL 3.0, 2.1, OpenGL ES 3.2, 3.1 (with AEP), 3.0, 2.0, and 1.1 OpenCL 1.2 Full Profile and 1.1 OpenVG 1.1 and Vulkan High-performance 2D Blit Engine H.265 decode (4Kp60) Video Processing Unit (VPU) H.264 decode (4Kp30) WMV9/VC-1 imple decode MPEG 1 and 2 decode AVS decode MPEG4.2 ASP, H.263, Sorenson Spark decode Divx 3.11 including GMC decode ON2/Google VP6/VP8 decode RealVideo 8/9/10 decode JPEG and MJPEG decode 2 H.264 encode (1080p30) Tensilica HiFi 4 DSP for pre- and 666 MHz post-processing Fixed-point and vector-floating-point support 32 KB instruction cache, 48 KB data cache, 512 KB SRAM (448 KB of OCRAM and 64 KB of TCM) Memory 64-bit LPDDR4 1600 MHz 1 Quad SPI which can be used to connect to an FPGA 2 Quad SPI or 1 Octal SPI (FlexSPI) for fast boot from SPI NOR flash 2 SD 3.0 card interfaces 1 eMMC5.1/SD3.0 RAW NAND (62-bit ECC support via BCH-62 module) i.MX 8QuadMax Automotive and Infotainment Applications Processors, Rev. 2, 05/2021 2 NXP Semiconductors