PH3230S,115 NXP

PH3230S N-channel TrenchMOS intermediate level FET Rev. 04 27 November 2009 Product data sheet 1. Product profile 1.1 General description Intermediate level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only. 1.2 Features and benefits Low conduction losses due to low Simple gate drive required due to low on-state resistance gate charge Saves PCB space due to small Suitable for logic level gate drive footprint sources 1.3 Applications Computer motherboards Notebook computers DC-to-DC convertors Switched-mode power supplies 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit V drain-source voltage T 25 C T 150 C - - 30 V DS j j I drain current T =25C V =10V - - 100 A D mb GS see Figure 1 and 3 P total power T = 25 C see Figure 2 - - 62.5 W tot mb dissipation Dynamic characteristics Q gate-drain charge V =5V I =50A -13 - nC GD GS D V =10V T =25C DS j see Figure 12 Static characteristics R drain-source V =10V I =25A -2.7 3.2 m DSon GS D on-state resistance T =25C j see Figure 9 and 10NXP Semiconductors PH3230S N-channel TrenchMOS intermediate level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1S source mb D 2S source 3S source G 4G gate mbb076 S mb D mounting base connected to 1234 drain SOT669 (LFPAK) 3. Ordering information Table 3. Ordering information Type number Package Name Description Version PH3230S LFPAK plastic single-ended surface-mounted package (LFPAK) 4 leads SOT669 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V drain-source voltage T 25 C T 150 C - 30 V DS j j V gate-source voltage -20 20 V GS I drain current V =10V T =25C see Figure 1 and 3 -100 A D GS mb V =10V T = 100 C see Figure 1 -63 A GS mb I peak drain current t 10 s pulsed T =25C see Figure 3 -300 A DM p mb P total power dissipation T =25C see Figure 2 -62.5 W tot mb T storage temperature -55 150 C stg T junction temperature -55 150 C j Source-drain diode I source current T =25C - 52 A S mb I peak source current t 10 s pulsed T =25C - 156 A SM p mb Avalanche ruggedness E repetitive drain-source V =10V I =5A V =15V R 50 -2.5 mJ DS(AL)R GS D sup GS avalanche energy E non-repetitive V =10V T =25C I =50A V 15 V -250 mJ DS(AL)S GS j(init) D sup drain-source avalanche unclamped R =50 GS energy PH3230S 4 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 27 November 2009 2 of 12