74LCX27MX ON Semiconductor

74LCX27 Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs January 2008 74LCX27 Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs Features General Description 5V tolerant inputs The LCX27 contains three 3-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 2.3V3.6V V specifications provided CC 5V systems to 3V systems. 4.9ns t max. (V = 3.3V), 10A I max. PD CC CC The 74LCX27 is fabricated with advanced CMOS tech- Power down high impedance inputs and outputs nology to achieve high speed operation while maintain- 24mA output drive (V = 3.0V) CC ing CMOS low power dissipation. Implements proprietary noise/EMI reduction circuitry Latch-up performance exceeds JEDEC 78 conditions ESD performance: Human body model > 2000V Machine model > 200V Ordering Information Package Order Number Number Package Description 74LCX27M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74LCX27SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX27MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX27 Rev. 1.3.074LCX27 Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs Connection Diagram Logic Symbol IEEE/IEC Pin Description Pin Names Description Truth Table A , B , C Inputs n n n O = A + B + C O Outputs n n n n n Inputs Output A B C O n n n n HX X L XHX L XX H L LLL H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX27 Rev. 1.3.0 2