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FAN5236 Dual Mobile-Friendly DDR / Dual-Output PWM Controller FAN5236 Dual Mobile-Friendly DDR / Dual-Output PWM Controller Features Description The FAN5236 PWM controller provides high efficiency and Highly Flexible, Dual Synchronous Sw itching PWM regulation for tw o output voltages adjustable in the range Controller that Includes Modes for: of 0.9V to 5.5V required to power I/O, chip-sets, and - DDR Mode w ith In-phase Operation for Reduced memory banks in high-performance notebook computers, Channel Interference PDAs, and Internet appliances. Synchronous rectification - 90 Phase-shifted, Two-stage DDR Mode for and hysteretic operation at light loads contribute to high Reduced Input Ripple efficiency over a wide range of loads. The Hysteretic Mode can be disabled separately on each PWM converter - Dual Independent Regulators, 180 Phase Shifted if PWM Mode is desired for all load levels. Efficiency is Complete DDR Memory Pow er Solution as a current-sense enhanced by using MOSFET R DS(ON) component. - V Tracks V TT DDQ/2 - V Buffered Reference Output Feedforward ramp modulation, average-current-mode DDQ/2 control scheme, and internal feedback compensation Lossless Current Sensing on Low -side MOSFET or provide fast response to load transients. Out-of-phase Precision Over-Current Using Sense Resistor operation with 180-degree phase shift reduces input V Under-Voltage Lockout CC current ripple. The controller can be transformed into a complete DDR memory pow er supply solution by Converters can Operate from +5V or 3.3V or Battery activating a designated pin. In DDR mode, one of the Pow er Input (5V to 24V) channels tracks the output voltage of another channel and Excellent Dynamic Response w ith Voltage provides output current sink and source capability Feedforw ard and Average-Current-Mode Control essential for proper pow ering of DDR chips. The buffered reference voltage required by this type of memory is also Pow er-Good Signal provided. The FAN5236 monitors these outputs and Supports DDR-II and HSTL generates separate PGx (pow er good) signals w hen the Light-Load Hysteretic Mode Maximizes Efficiency soft-start is completed and the output is within 10% of the set point. Built-in over-voltage protection prevents the TSSOP28 Package output voltage from going above 120% of the set point. Normal operation is automatically restored w hen the over- Applications voltage conditions cease. Under-voltage protection latches the chip off w hen output drops below 75% of the DDR V and V Voltage Generation DDQ TT set value after the soft-start sequence for this output is completed. An adjustable over-current function monitors Mobile PC Dual Regulator the output current by sensing the voltage drop across the Server DDR Pow er i lower MOSFET. If precision current-sensing is required, Hand-held PC Pow er an external current-sense resistor may be used. Related Resources