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FDD86113LZ N-Channel Shielded Gate PowerTrench MOSFET March 2015 FDD86113LZ N-Channel Shielded Gate PowerTrench MOSFET 100 V, 5.5 A, 104 m Features General Description Shielded Gate MOSFET Technology This N-Channel logic Level MOSFETs are produced using Fairchild Semiconductors advanced PowerTrench process Max r = 104 m at V = 10 V, I = 4.2 A DS(on) GS D that incorporates Shielded Gate technology. This process has been optimized for the on-state resistance and yet maintain Max r = 156 m at V = 4.5 V, I = 3.4 A DS(on) GS D superior switching performance. G-S zener has been added to enhance ESD voltage level. HBM ESD protection level > 6 kV typical (Note 4) High performance trench technology for extremely low rDS(on) Application High power and current handling capability in a widely used DC-DC conversion surface mount package 100% UIL Tested RoHS Compliant D D G G S D-PAK TO-252 (TO-252) S MOSFET Maximum Ratings T = 25 C unless otherwise noted C Symbol Parameter Ratings Units V Drain to Source Voltage 100 V DS V Gate to Source Voltage 20 V GS Drain Current -Continuous T = 25 C 5.5 C I -Continuous TA = 25 C (Note 1a) 4.2 A D -Pulsed 15 E Single Pulse Avalanche Energy (Note 3) 12 mJ AS Power Dissipation T = 25 C 29 C P W D Power Dissipation T = 25 C (Note 1a) 3.1 A T , T Operating and Storage Junction Temperature Range -55 to +150 C J STG Thermal Characteristics R Thermal Resistance, Junction to Case (Note 1) 4.3 JC C/W R Thermal Resistance, Junction to Ambient (Note 1a) 96 JA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDD86113LZ FDD86113LZ D-PAK(TO-252) 13 16 mm 2500 units 2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDD86113LZ Rev. 1.3