MC10ELT28, MC100ELT28 5 VTTL to Differential PECL and Differential PECL to TTL Translator Description www.onsemi.com The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because MARKING DIAGRAMS* PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual translation 8 8 8 design of the ELT28 makes it ideal for applications which are sending HLT28 KLT28 1 and receiving signals across a backplane. ALYW ALYW SOIC8 The 100 Series contains temperature compensation. D SUFFIX 1 1 CASE 751 Features 3.5 ns Typical PECL to TTL Propagation Delay 8 8 1.2 ns Typical TTL to PECL Propagation Delay 8 1 PNP TTL Inputs for Minimal Loading HT28 KT28 ALYW ALYW TSSOP8 24 mA TTL Outputs DT SUFFIX 1 1 Flow Through Pinouts CASE 948R Operating Range V = 4.75 V to 5.25 V with GND= 0 V CC Q Output Will Default High with Inputs Left Open or < 1.3 V TTL H = MC10 A = Assembly Location K = MC100 L = Wafer Lot Q Output Will Default High with Inputs Left Open ECL Y = Year Internal PECL Input Pulldown Resistors W = Work Week These Devices are PbFree, Halogen Free/BFR Free and are RoHS = PbFree Package Compliant (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: August, 2015 Rev. 11 MC10ELT28/DMC10ELT28, MC100ELT28 Table 1. PIN DESCRIPTION DECL 1 8 V CC Pin Function QTTL TTL Outputs DECL 2 QTTL 7 DTTL TTL Data Inputs PECL TTL QECL, QECL PECL Differential Outputs QECL 6 DTTL 3 DECL, DECL PECL Differential Inputs V Positive Supply CC QECL45 GND GND Ground Figure 1. 8Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value ESD Protection Human Body Model > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) PbFree Pkg SOIC8 Level 1 TSSOP8 Level 3 Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 0.125 in Transistor Count 71 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V Positive Power Supply GND = 0 V 7 V CC V Input Voltage GND = 0 V V V 0 to 6 V IN I CC I PECL Output Current Continuous 50 mA out Surge 100 mA T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg Thermal Resistance (JunctiontoAmbient) 0 lfpm SOIC8 190 C/W JA 500 lfpm SOIC8 130 C/W Thermal Resistance (JunctiontoCase) Standard Board SOIC8 41 to 44 C/W JC Thermal Resistance (JunctiontoAmbient) 0 lfpm TSSOP8 185 C/W JA 500 lfpm TSSOP8 140 C/W Thermal Resistance (JunctiontoCase) Standard Board TSSOP8 41 to 44 5% C/W JC T Wave Solder PbFree <2 to 3 sec 260C 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2