MC100EP01DTG ON Semiconductor

3.3 V/5 VECL 4-Input OR/NOR MC10EP01, MC100EP01 Description The MC10EP01 is a 4-input OR/NOR gate. The device is www.onsemi.com functionally equivalent to the EL01 device, LVEL01, and E101 (a quad version). With AC performance much faster than the LVEL01 device, the EP01 is ideal for applications requiring the fastest AC 8 8 performance available. 1 1 The 100 Series contains temperature compensation. SOIC8 NB TSSOP8 DFN8 D SUFFIX DT SUFFIX MN SUFFIX Features CASE 75107 CASE 948R02 CASE 506AA 230 ps Typical Propagation Delay Maximum Frequency = > 3 GHz Typical PECL Mode Operating Range: MARKING DIAGRAMS* V = 3.0 V to 5.5 V with V = 0 V CC EE NECL Mode Operating Range: 8 8 V = 0 V with V = 3.0 V to 5.5 V KEP01 CC EE KP01 ALYW Open Input Default State ALYW These Devices are Pb-Free, Halogen Free and are RoHS Compliant 1 14 1 SOIC8 NB TSSOP8 DFN8 A = Assembly Location L = Wafer Lot K = MC100 Y = Year 5H = MC10 W = Work Week M = Date Code = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Shipping Device Package MC10EP01MNR4G DFN8 1000 / (Pb-Free) Tape & Reel 98 Units / Tube SOIC8 MC100EP01DG NB (Pb-Free) MC100EP01DTG 100 Units / Tube TSSOP8 (Pb-Free) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: March, 2021 Rev. 11 MC10EP01/D 5H M MC10EP01, MC100EP01 Table 1. PIN DESCRIPTION D0 1 8 V CC Pin Function D0 D3 ECL Data Inputs Q, Q ECL Data Outputs D1 2 7 Q V Positive Supply CC V Negative Supply EE EP (DFN8 only) Thermal exposed pad must be D2 3 6 Q connected to a sufficient thermal conduit. Elec- trically connect to the most negative supply (GND) or leave unconnected, floating open. D345 V EE Table 2. TRUTH TABLE D0* D1* D2* D3* Q Q L L L L L H Figure 1. 8-Lead Pinout (Top View) H X X X H L and Logic Diagram X H X X H L X X H X H L X X X H H L H H H H H L *Pins will default LOW when left open. Table 3. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 k Internal Input Pullup Resistor N/A ESD Protection Human Body Model > 4 kV Machine Model > 200 V Charged Device Model > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg SOIC8 NB Level 1 TSSOP8 Level 3 DFN8 Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 0.125 in Transistor Count 115 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. www.onsemi.com 2