5 V ECL D FlipFlop with Set and Reset MC10EL31, MC100EL31 Description The MC10EL/100EL31 is a D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher www.onsemi.com performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ideally 8 suited for those applications which require the ultimate in AC performance. 1 Both set and reset inputs are asynchronous, level triggered signals. SOIC8 NB Data enters the master portion of the flip-flop when clock is LOW and D SUFFIX is transferred to the slave, and thus the outputs, upon a positive CASE 75107 transition of the clock. The 100 Series contains temperature compensation. MARKING DIAGRAMS* Features 8 475 ps Propagation Delay HEL31 ALYW 2.8 GHz Toggle Frequency ESD Protection: 1 > 1 kV Human Body Model > 100 V Machine Model 8 PECL Mode Operating Range: V = 4.2 V to 5.7 V CC KEL31 with V = 0 V EE ALYW NECL Mode Operating Range: V = 0 V CC 1 with V = 4.2 V to 5.7 V EE Internal Input Pulldown Resistors on D, CLK, S, and R H = MC10 K = MC100 Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test A = Assembly Location Moisture Sensitivity: L = Wafer Lot Level 1 for SOIC8 NB Y = Year W = Work Week For Additional Information, see Application Note AND8003/D = Pb-Free Package Flammability Rating: UL 94 V0 0.125 in, (Note: Microdot may be in either location) Oxygen Index: 28 to 34 *For additional marking information, refer to Metastability 125 ps (see Application Note AN1504) Application Note AND8002/D. Transistor Count = 79 Devices ORDERING INFORMATION These Devices are Pb-Free, Halogen Free and are RoHS Compliant Device Package Shipping SOIC8 NB MC10EL31DG 98 Units / Tube (Pb-Free) SOIC8 NB MC10EL31DR2G 2500 / (Pb-Free) Tape & Reel SOIC8 NB 98 Units / Tube MC100EL31DG (Pb-Free) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifica- tions Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: March, 2021 Rev. 8 MC10EL31/DMC10EL31, MC100EL31 Table 1. TRUTH TABLE S 1 8 V CC D S* R* CLK Q L L L Z L S H L L Z H D 2 Q X H L X H 7 D X L H X L X H H X Undef Z = LOW to HIGH Transition CLK 3 6 Q * Pins will default low when left open. R Table 2. PIN DESCRIPTION PIN FUNCTION R45 V EE S ECL Set Input D ECL Data Input Figure 1. Logic Diagram and Pinout Assignment R ECL Reset Input CLK ECL Clock Input Q, Q ECL Data Outputs V Positive Supply CC V Negative Supply EE Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V PECL Mode Power Supply- V = 0 V 8 V CC EE V NECL Mode Power Supply V = 0 V 8 V EE CC V PECL Mode Input Voltage V = 0 V V V 6 V I EE I CC NECL Mode Input Voltage V V 6 V = 0 V I EE CC I Output Current Continuous 50 mA out Surge 100 T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg Thermal Resistance (Junction-to-Ambient) 0 lfpm SOIC8 NB 190 C/W JA SOIC8 NB 130 500 lfpm Thermal Resistance (Junction-to-Case) Standard Board SOIC8 NB 41 to 44 C/W JC T Wave Solder (Pb-Free) < 2 to 3 sec 260C 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2