MC10EL32, MC100EL32 5 VECL 2 Divider Description The MC10EL/100EL32 is an integrated 2 divider. The differential clock inputs and the V allow a differential, single-ended or AC coupled BB interface to the device. The V pin, an internally generated voltage BB supply, is available to this device only. For single-ended input conditions, www.onsemi.com the unused differential input is connected to V as a switching reference BB voltage. V may also rebias AC coupled inputs. When used, decouple BB V and V via a 0.01 F capacitor and limit current sourcing or sinking BB CC 8 to 0.5 mA. When not used, V should be left open. BB 8 1 The reset pin is asynchronous and is asserted on the rising edge. Upon 1 power-up, the internal flip-flop will attain a random state the reset allows for the synchronization of multiple EL32s in a system. SOIC8NB TSSOP8 The 100 Series contains temperature compensation. D SUFFIX DT SUFFIX CASE 75107 CASE 948R02 Features 510 ps Propagation Delay 3.0 GHz Toggle Frequency MARKING DIAGRAMS* ESD Protection: > 1 kV Human Body Model 8 8 > 100 V Machine Model HEL32 HL32 PECL Mode Operating Range: ALYW ALYW V = 4.2 V to 5.7 V with V = 0 V CC EE 1 1 NECL Mode Operating Range: V = 0 V with V = 4.2 V to 5.7 V CC EE 8 8 Internal Input Pulldown Resistors on CLK(s) and R. KEL32 KL32 Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test ALYW ALYW Moisture Sensitivity 1 1 Level 1 for SOIC8NB Level 3 for TSSOP8 For Additional Information, see Application Note AND8003/D H = MC10 L = Wafer Lot K = MC100 Y = Year Flammability Rating: UL 94 V0 0.125 in, 4U = MC10 W = Work Week Oxygen Index: 28 to 34 2J = MC100 M = Date Code Transistor Count = 82 devices A = Assembly Location = Pb-Free Package These Devices are Pb-Free, Halogen Free and are RoHS Compliant (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information on page 6 of this data sheet. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: July, 2016 Rev. 9 MC10EL32/DMC10EL32, MC100EL32 Table 1. PIN DESCRIPTION Reset 1 8 V CC PIN FUNCTION CLK, CLK ECL Clock Inputs* R CLK 2 7 Q Reset ECL Asynch Reset* 2 Q, Q ECL Data Outputs V Reference Voltage Output 3 6 BB CLK Q V Positive Supply CC V Negative Supply EE V 4 5 V BB EE *Pins will default low when left open. Figure 1. Logic Diagram and Pinout Assignment Table 2. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V PECL Mode Power Supply V = 0 V 8 V CC EE V NECL Mode Power Supply V = 0 V 8 V EE CC V PECL Mode Input Voltage V = 0 V V V 6 V I EE I CC NECL Mode Input Voltage V = 0 V V V 6 CC I EE I Output Current Continuous 50 mA out Surge 100 I V Sink/Source 0.5 mA BB BB T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg Thermal Resistance (Junction-to-Ambient) 0 lfpm SOIC8NB 190 C/W JA 500 lfpm 130 Thermal Resistance (Junction-to-Case) Standard Board SOIC8NB 41 to 44 C/W JC Thermal Resistance (Junction-to-Ambient) 0 lfpm TSSOP8 185 C/W JA 500 lfpm 140 Thermal Resistance (Junction-to-Case) Standard Board TSSOP8 41 to 44 5% C/W JC T Wave Solder (Pb-Free) <2 to 3 sec 260C 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. JEDEC standard multilayer board 2S2P (2 signal, 2 power) www.onsemi.com 2