AX8052F100 Ultra-Low Power Microcontroller OVERVIEW The AX8052F100 is a single chip ultralowpower microcontroller www.onsemi.com primarily for use in radio applications. The AX8052F100 contains a high speed microcontroller compatible to the industry standard 8052 instruction set. It contains 64 kBytes of FLASH and 8.25 kBytes of internal SRAM. The AX8052F100 features 3 16bit general purpose timers with capability, 2 output compare units for generating 1 28 PWM signals, 2 input compare units to record timings of external QFN28 5x5, 0.5P signals, 2 16bit wakeup timers, a watchdog timer, 2 UARTs, a CASE 485EH Master/Slave SPI controller, a 10bit 500 kSample/s A/D converter, 2 analog comparators, a temperature sensor, a 2 channel DMA ORDERING INFORMATION controller, and a dedicated AES crypto controller. Debugging is aided Device Package Shipping by a dedicated hardware debug interface controller that connects using AX8052F1002TA05 a 3wire protocol (1 dedicated wire, 2 shared with GPIO) to the PC QFN28 500 / hosting the debug software. (PbFree) Tape & Reel AX8052F1003TA05 Features AX8052F1002TW30 QFN28 3,000 / Ultralow Power Microcontroller (PbFree) Tape & Reel AX8052F1003TW30 QFN28 Package Supply Range 1.8 V 3.6 V For information on tape and reel specifications, including part orientation and tape sizes, please 40C to 85C refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Ultralow Power Consumption: CPU Active Mode 150 A/MHz Sleep Mode with 256 Byte RAM Retention and DebugLink Interface allows printf Style Debugging Wakeup Timer running 850 nA without utilizing a UART or GPIO Pins Sleep Mode 4 kByte RAM Retention and Wakeup Memory Timer running 1.5 A Sleep Mode 8 kByte RAM Retention and Wakeup 64 kByte FLASH Timer running 2.2 A 100,000 Erase Cycles 10 Year Data Retention AX8052 Core 8.25 kByte RAM Industry Standard 8052 Instruction Set High Performance Memory Crossbar High Performance Core, most Instructions Require only 1 Clock per Instruction Byte Clocking 20 MIPS Four Clock Sources Onchip 20 MHz RCoscillator Dual DPTR for High Speed Memory Chips 10 kHz/640 Hz Ultralowpower RCoscillator 22 Interrupt Vectors Fast Crystal Oscillator Debugger Low Power Tuning Fork Crystal Oscillator Threewire (1 dedicated, 2 shared with GPIO Pins) Fully Automatic Calibration of Onchip RC Oscillators Debugger Interface to a Reference Clock True Hardware Debugger with Breakpoints and Single Clock Monitor can Detect Failures of the Main Clock and Switch to the Onchip Fast RC Oscillator Stepping Support User Programmable 64bit Key to restrict Debugging Watchdog to Authorized Personnel Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: May, 2018 Rev. 5 AX8052F100/DAX8052F100 Power Modes ADC Standby, Sleep and Deep Sleep Power Modes for Very 10bit 500 kSamples/s ADC Low Idle Power Consumption Up to 8 Channels Onchip PoweronReset and Brownout Detection Single Ended and Differential Sampling Unrestricted Operation from 1.8 V 3.6 V VDD IO x0.1, x1 and x10 Gain Amplifier Internal 1 V Reference 16bit Wakeup Timer Flexibly Programmable Conversion Schedule Two Counting Registers Builtin Temperature Sensor Four Event Registers Allow Flexible Wakeup and Software Schedules Analog Comparators Internal and External Reference GPIO Output Signal may be Routed to GPIO, Read by 24 GPIO Pins Software, or Used as Input Capture Trigger PB0PB7, PC0PC3 and PR0PR5 5 V Tolerant Inputs DMA Controller All GPIO Pins Support Individually Programmable 2 Independent DMA Channels Pullups and Interrupt on Change Moves Data between XRAM and most Onchip Flexible Allocation of GPIO Pins to Peripherals Peripherals Cyclesteal and Roundrobin Memory Arbitration 16bit General Purpose Timer (3x) ensure Minimal Impact on AX8052 Core Saw Tooth and Triangle Modes Chained Buffer Descriptors allow Arbitrarily Elaborate SigmaDelta Mode Converts Timer into a DAC Buffering Schemes and Flexible Interrupt Generation Optional Double Buffering of the PERIOD Register allows Controlled Frequency Changes AES Optional Highbyte Buffering allows Atomic 16bit Dedicated AES Crypto Controller Accesses Dedicated DMA Engine to fetch Input Data and Key Flexible Clocking Options, can use any Internal or an Stream from XRAM and Strobe Output Data into External Clock Source XRAM Prescaler Included Multi Megabit/s Data Rates Supports AES128, AES192 and AES256 16bit Output Compare Unit (2x) International Standards Used together with a General Purpose Timer to create Programmable Round Number and Software Key PWM Waveforms Schedule Generation allow Longer Key Lengths for Optional Double Buffering Higher Security Applications ECB, CFB and OFB Chaining Modes 16bit Input Capture Unit (2x) NOTE: The AES engine requires software enabling and Used together with a General Purpose Timer to time support. Events on an External or Internal Signal True Random Number Generator (RNG) UART (2x) Cryptographic Random Numbers 59 bit Word Length, 12 Stop Bits NOTE: The random number generator requires software Uses One of the General Purpose Timers as Baud Rate enabling and support. Generator Applications Dedicated Radio Master SPI Interface Ultralow Power Microcontroller Applications, Compatible to AX RF and other Peripherals especially in Conjunction with AXRadio IC Sensor Applications Efficient CPU Access Easy Access to Transceiver Registers by Mapping Home Automation Transceiver Registers into X Address Space Automatic Meter Reading Transceiver Crystal may clock MCU Remote Keyless Entry Active RFID Master/Slave SPI Wireless Audio Supports 3 and 4 Wire Variants www.onsemi.com 2