MM74HCT08 Quad 2-Input AND Gate March 2008 MM74HCT08 Quad 2-Input AND Gate Features General Description TTL, LS pin-out and threshold compatible The MM74HCT08 is a logic function fabricated by using advanced silicon-gate CMOS technology which provides Fast switching: t , t = 12ns (typ.) PLH PHL the inherent benefits of CMOSlow quiescent power Low power: 10W at DC and wide power supply range. This device is input and High fan-out, 10 LS-TTL loads output characteristic and pinout compatible with stan- dard 74LS logic families. All inputs are protected from static discharge damage by internal diodes to V and CC ground. MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power con- sumption in existing designs. Ordering Information Package Order Number Number Package Description MM74HCT08M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow MM74HCT08SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT08MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HCT08N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. Connection Diagram Logic Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP 1983 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HCT08 Rev. 1.3.0MM74HCT08 Quad 2-Input AND Gate (1) Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Rating V Supply Voltage 0.5 to +7.0V CC V DC Input Voltage 1.5 to V +1.5V IN CC V DC Output Voltage 0.5 to V +0.5V OUT CC I , I Clamp Diode Current 20mA IK OK I DC Output Current, per pin 25mA OUT I DC V or GND Current, per pin 50mA CC CC T Storage Temperature Range 65C to +150C STG P Power Dissipation D Note 2 600mW S.O. Package only 500mW T Lead Temperature (Soldering 10 seconds) 260C L Notes: 1. Unless otherwise specified all voltages are referenced to ground. 2. Power Dissipation temperature derating plastic N package: 12mW/C from 65C to 85C. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Min. Max. Units V Supply Voltage 4.5 5.5 V CC V , V DC Input or Output Voltage 0 V V IN OUT CC T Operating Temperature Range 40 +85 C A t , t Input Rise or Fall Times 500 ns r f 1983 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HCT08 Rev. 1.3.0 2