NC7WZ125K8X ON Semiconductor

TinyLogic UHS Dual Buffer with 3-STATE Outputs NC7WZ125 Description The NC7WZ125 is a Dual Non Inverting Buffer with independent active LOW enables for the 3STATE outputs. The Ultra High Speed www.onsemi.com device is fabricated with advanced CMOS technology to achieve superior switching performance with high output drive while MARKING maintaining low static power dissipation over a broad V operating CC DIAGRAMS range. The device is specified to operate over the 1.65 V to 5.5 V V CC operating range. The inputs and outputs are high impedance when UQFN8 P3KK V is 0 V. Inputs tolerate voltages up to 5.5 V independent of V CC CC 1.6X1.6, 0.5P XYZ operating range. Outputs tolerate voltages above V when in the CC CASE 523AY 3STATE condition. Features Space Saving US8 Surface Mount Package MicroPak PbFree Leadless Package US8 WZ25 CASE 846AN Ultra High Speed: t 2.6 ns Typ. into 50 pF at 5 V V PD CC ALYW High Output Drive: 24 mA at 3 V V CC Broad V Operating Range: 1.65 V to 5.5 V CC Matches the Performance of LCX when Operated at 3.3 V V CC P3, WZ25 = Specific Device Code Power Down High Impedance Inputs / Outputs KK = 2Digit Lot Run Traceability Code Overvoltage Tolerant Inputs Facilitate 5 V to 3 V Translation XY = 2Digit Date Code Format Outputs are Overvoltage Tolerant in 3STATE Mode Z = Assembly Plant Code A = Assembly Site Proprietary Noise / EMI Reduction Circuitry Implemented L = Wafer Lot Number These Devices are PbFree, Halogen Free/BFR Free and are RoHS YW = Assembly Start Week Compliant ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 6 of this data sheet. IEEE/IEC A 1 1 Y 1 OE EN 1 A 2 1 Y 2 EN OE 2 Figure 1. Logic Symbol Semiconductor Components Industries, LLC, 2005 1 Publication Order Number: October, 2020 Rev. 2 NC7WZ125/DNC7WZ125 Connection Diagrams OE A Y 1 1 2 7 6 5 OE 1 8 V 1 CC A 2 7 OE 1 2 V 8 4 GND CC Y 3 6 Y 2 1 1 2 3 GND45 A 2 OE Y A 2 1 2 Figure 2. Connection Diagram Figure 3. Pad Assignments for MicroPak (Top View) (Top Thru View) PIN DESCRIPTIONS FUNCTION TABLE Pin Names Description Inputs Output OE Enable Inputs for 3STATE Outputs OE A Y n n n A Input L L L n Y 3STATE Outputs L H H n H L Z H H Z H = HIGH Logic Level L = LOW Logic Level Z = 3STATE www.onsemi.com 2