NCP1532MUAATXG ON Semiconductor

NCP1532 Dual, Output Step-Down Converter 2.25 MHz The NCP1532 dual step down DCDC converter is a monolithic NCP1532 2.2 H VOUT1 3 VIN SW1 4 18pF 11 10 F 5 1 GND FB1 POR OFF ON 2 EN1 POR 8 2.25 MHz Range 2.2 H OFF ON 6 MODE/SYNC 7 VOUT2 SW2 18pF 9 OFF ON EN2 10 FB2 10 F NOTE: Exposed pad of UDFN10 package named pin11 must be connected to system ground. Figure 1. NCP1532 Typical Application PIN FUNCTION DESCRIPTION Pin Pin Name Type Description 1 FB1 Analog Input Feedback voltage from the output 1. This is the input to the error amplifier. 2 EN1 Digital Input Enable for converter 1. This pin is active HIGH (higher than 1.2 V) and is turned off by logic LOW (lower than 0.4 V. Do not leave this pin floating. 3 VIN Analog / Power Power supply input for the PFET power stage, analog and digital blocks. The pin must Input be decoupled to ground by a 10 F ceramic capacitor. 4 SW1 Analog Output Connection from power MOSFETs of output 1 to the Inductor. 5 GND Analog Ground This pin is the GROUND reference for the analog section of the IC. The pin must be connected to the system ground by 10 F low ESR ceramic capacitor. 6 MODE/SYNC Digital Input Combination Mode Selection and Oscillator Synchronization. If this pin is LOW, the regulator runs in automatic switching PFM/PWM. With a HIGH level (equal or lower Analog Input voltage), the converter runs in PWM mode only. This pin can be also syn- chronized to an external clock in the range of 2.25 MHz in this case the device runs in PWM mode only. Insert the clock before enabling the part is recommended to force external synchronization. Do not let this pin floating. Following rule is being used: 0: Eco mode, automatic switching PFM/PWM, 180 out of phase. 1: Low noise, forced PWM mode, 180 out of phase. CLK: External synchronization, forced PWM mode, 0 in phase. 7 SW2 Analog Output Connection from power MOSFETs of output 2 to the Inductor. 8 POR Digital Output Power On Reset. This is an open drain output. This output is shutting down when each output voltages are less than 90% of their nominal values and goes high after 120 ms when active outputs are within regulation. A pullup resistor around 500k should be connected between POR and V , V or V depending on the supplied device. IN OUT1 OUT2 9 EN2 Digital Input Enable for converter 2. This pin is active HIGH (higher than 1.2 V) and is turned off by logic LOW (lower than 0.4 V). Do not let this pin floating. 10 FB2 Analog Input Feedback voltage from the output 2. This is the input to the error amplifier. 11 Exposed Pad Power Ground This pin is the GROUND reference for the NFET power stage of the IC. The pin must be connected to the system ground and to both input and output capacitors.