NCP51510, NCV51510 3 Amp V Termination TT Source / Sink Regulator for DDR, DDR-2, DDR-3, DDR-4 The NCP51510 is a source/sink Double Data Rate (DDR) termination regulator specifically designed for low input voltage and www.onsemi.com lownoise systems where space is a key consideration. The NCP51510 maintains a fast transient response and only requires a minimum V load capacitance of 10 F for output stability. The TT NCP51510 supports remote sensing and all power requirements for DFN10 DDR V bus termination. The NCP51510 can also be used in TT CASE 485C lowpower chipsets and graphics processor cores that require dynamically adjustable output voltages. The NCP51510 is available in MARKING DIAGRAM the thermallyefficient DFN10 Exposed Pad package, and is rated both Green and PbFree. 51510 Features ALYW Generate DDR Memory Termination Voltage (V ) TT For DDR, DDR2, DDR3 and DDR4 Source / Sink Currents 51510 = Specific Device Code Supports Loads Up to 3 A (Typ), Output is OverCurrent Protected A = Assembly Location Integrated MOSFETs with Thermal Shutdown Protection L = Wafer Lot Y = Year Fast LoadTransient Response W = Work Week P Output Pin to Monitor Status of V Output Regulation GOOD TT = PbFree Package SS Input Pin for Suspend Shutdown mode (Note: Microdot may be in either location) V Input Reference for Flexible Voltage Tracking RI V Input for Remote Sensing (Kelvin Connection) TTS PIN CONNECTIONS Builtin SoftStart, Under Voltage Lockout Small, LowProfile 10pin, 3 x 3 mm DFN Package V PV 1 10 RO CC NCV51510MWTAG Wettable Flank Option for Enhanced Optical V V 2 9 CC TT Inspection NCV Prefix for Automotive and Other Applications Requiring A 3 GND 8 P GND GND Unique Site and Control Change Requirements AECQ100 V 4 7 SS RI Qualified and PPAP Capable* This is a PbFree Device V P TTS 6 GOOD 5 Applications (Top View) DDR Memory Termination Desktop PCs, Notebooks, and Workstations Servers and Networking equipment ORDERING INFORMATION Telecom/Datacom, GSM Base Station Device Package Shipping Graphics Processor Core Supplies NCP51510MNTAG Set Top Boxes, LCDTV/PDPTV, Copier/Printers DFN10 3000 / Tape & NCV51510MNTAG* (PbFree) Reel Supplies Power for Chipset/RAM as Low as 0.5 V NCV51510MWTAG* Active Source/Sink Bus Termination For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: April, 2015 Rev. 2 NCP51510/DNCP51510, NCV51510 PIN FUNCTION DESCRIPTION Pin Number Pin Name Pin Function 1 V OUTPUT Buffered Output of V Reference Input pin. RO RI 2 V INPUT Regulator Analog Power Input pin. Connect to the system supply voltage. Bypass V to A CC CC GND with a 1 F or greater ceramic capacitor. 3 A Analog Ground GND 4 V INPUT External Reference Input for V Output (see Figure 1 for typical application) RI TT 5 P OUTPUT V Power Good pin (open drain output) GOOD TT 6 V INPUT Remote Sense Input for V . The V pin provides accurate remote feedback sensing of the TTS TT TTS V output. TT 7 SS INPUT Suspend Shutdown Control Input. CMOS compatible. Logic HIGH = enable, logic LOW = shutdown. Connect to VDDQ for normal operation. 8 P Power Ground. Internally connected to Lowside MOSFET GND 9 V OUTPUT Regulated Power Output pin TT 10 PV INPUT Regulator Power Input pin. Internally connected to Highside MOSFET CC THERMAL Pad for thermal connection. The exposed pad must be connected to the ground plane using multiple vias PAD for maximum power dissipation performance. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit PV to P (Note 1) 0.3 to 4.3 CC GND V to A (Note 1) V 0.3 to 4.3 CC GND CC V , V , SS, P to A (Note 1) 0.3 to (V + 0.3) RI RO GOOD GND CC V V to P (Note 1) 0.3 to (PV + 0.3) TT GND CC V to A (Note 1) V 0.3 to (PV + 0.3) TTS GND TTS CC P to A P 0.3 to +0.3 GND GND GND Storage Temperature T 65 to 150 stg C Operating Junction Temperature Range T 40 to 125 J ESD Capability, Human Body Model (Note 2) ESD 2000 V HBM ESD Capability, Machine Model (Note 2) ESD 200 V MM V Output Continuous RMS Current 100 sec 1.6 TT A 1 sec 2.5 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AECQ100002 (EIA/JESD22A114) ESD Machine Model tested per AECQ100003 (EIA/JESD22A115) Latchup Current Maximum Rating tested per JEDEC standard: JESD78. DISSIPATION RATINGS Package T =70 C Power Rate Derating Factor Above T = 70 C A A 10Pin DFN 1951 mW 24.4 mW / C www.onsemi.com 2