DATA SHEET www.onsemi.com Automotive Grade 8 1 Non-Synchronous Buck SOIC8 Controller SUFFIX D CASE 751 NCV8852 The NCV8852 is an adjustableoutput nonsynchronous buck MARKING DIAGRAM controller which drives an external Pchannel MOSFET. The device 8 uses peak current mode control with internal slope compensation. The 8852xxG IC incorporates an internal regulator that supplies charge to the gate ALYW driver. Protection features include internal softstart, undervoltage lockout, 1 cyclebycycle current limit, hiccupmode overcurrent protection, hiccupmode shortcircuit protection. Additional features include: programmable switching frequency, 8852xxG = Specific Device Code xx = 01 low quiescent current sleep mode and externally synchronizable A = Assembly Location switching frequency. L = Wafer Lot Y = Year Features W = Work Week Ultra Low Iq Sleep Mode = PbFree Package Adjustable Output with 800 mV 2.0% Reference Voltage Wide Input of 3.1 to 44 V with Undervoltage Lockout (UVLO) Programmable Switching Frequency PINOUT DIAGRAM Internal SoftStart (SS) FixedFrequency Peak Current Mode Control 1 ROSC VIN 8 Internal Slope Compensating Artificial Ramp Internal HighSide PMOS Gate Driver 2 7 EN/SYNC ISNS Regulated Gate Driver Current Source 3 COMP 6 GDRV External Frequency Synchronization (SYNC) 4 5 FB GND Programmable CyclebyCycle Current Limit (CL) Hiccup Overcurrent Protection (OCP) Output Short Circuit Hiccup Protection (SCP) SpaceSaving 8PIN SOIC Package ORDERING INFORMATION NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements AECQ100 Device Package Shipping Qualified and PPAP Capable NCV885201D1R2G SOIC8 2500/Tape & Reel (PbFree) These Devices are PbFree and are RoHS Compliant For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: November, 2021 Rev. 9 NCV8852/DNCV8852 VIN ROSC VIN EN/SYNC EN/SYNC ISNS COMP GDRV FB GND VO Figure 1. NCV8852 Application Diagram 8 VIN UVLO CSA 7 ISNS OCP CL FAULT 2 EN/SYNC LOGIC DRIVE 6 GDRV OSC LOGIC 1 ROSC + SCP PWM CLAMP 4 FB SS 3 VEA COMP V REF 5 GND Figure 2. NCV8852 Simple Block Diagram PIN DESCRIPTIONS No Pin Symbol Function 1 ROSC Use a resistor from ground to set the frequency. 2 EN/SYNC Enable and synchronization input. The falling edge synchronizes the internal oscillator. The part is disabled into sleep mode when this pin is brought low for longer than the enable timeout period. 3 COMP Output of the voltage error amplifier. An external compensator network from COMP to GND is used to sta- bilize the converter and tailor transient performance. 4 FB Output voltage feedback. A resistor from the output voltage to FB with another resistor from FB to GND creates a voltage divider for regulation and programming of the output voltage. 5 GND Ground reference. 6 GDRV Gate driver output. Connect to gate of the external Pchannel MOSFET. A series resistance can be added from GDRV to the gate to tailor EMC performance. 7 ISNS Current sense input. Connect this pin to the source of the external P channel MOSFET, through a current sense resistor to VIN to sense the switching current for regulation and current limiting. 8 VIN Main power input for the IC. www.onsemi.com 2