NLAS4717EPFCT1G ON Semiconductor

NLAS4717EP 4.5 High Bandwidth, Dual SPDT Analog Switch The NLAS4717EP is an advanced CMOS analog switch fabricated in submicron silicon gate CMOS technology. The device is a dual independent Single Pole Double Throw (SPDT) switch featuring low NLAS4717EP NO1 V CC GND 2 1 B 1 NC1 C A NC2 1 1 COM1 3 10 NO2 C A IN2 IN1 4 9 COM2 IN1 2 2 C A COM2 COM1 3 3 5 8 NC1 IN2 C A NO1 NO2 4 4 B 6 7 4 VCC GND NC2 Microbump WQFN (Top View) (Top View) Figure 1. Device Circuit Diagrams and Pin Configurations MAXIMUM RATINGS Symbol Parameter Value Unit V+ DC Supply Voltage 0.5 to 7.0 V V Analog Input Voltage (V , V , or V ) (Note 1) V 0.5 V V 0.5 IS NO NC COM IS CC V Digital Select Input Voltage 0.5 V 7.0 V IN I I DC Current, Into or Out of Any Pin (Continuous) 100 mA IK I Peak Current (10% Duty Cycle) 200 mA PK Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Signal voltage on NC, NO, and COM exceeding VCC or GND are clamped by the internal diodes. Limit forward diode current to maximum current rating. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit V+ DC Supply Voltage 1.8 5.5 V V Digital Select Input Voltage GND 5.5 V IN V Analog Input Voltage (NC, NO, COM) GND V V IS CC T Operating Temperature Range 40 +85 C A t , t Input Rise or Fall Time, SELECT ns/V r f V = 3.3 V 0.3 V 0 100 CC V = 5.0 V 0.5 V 0 20 CC