501BMILF Renesas

DATASHEET LOCO PLL CLOCK MULTIPLIER ICS501B Description Features TM The ICS501B LOCO is the most cost effective way to Packaged as 8 pin SOIC or die generate a high-quality clock output from a lower Pb (lead) free package frequency crystal or clock input. The name LOCO IDTs lowest cost PLL clock stands for Low Cost Oscillator, as it is designed to Zero ppm multiplication error replace crystal oscillators in most electronic systems. Output clock frequencies up to 15 MHz Using Phase-Locked Loop (PLL) techniques, the Extremely low jitter of 25 ps (one sigma) device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 15 Compatible with popular CPUs MHz. Duty cycle of 45/55 up to 20 MHz Nine selectable frequencies Stored in the chips ROM is the ability to generate nine different multiplication factors, allowing one chip to Operating voltage of 3.3 V or 5.5 V output many common frequencies (see table on page Tri-state output for board level testing 2). 25 mA drive capability at TTL levels The device also has an output enable pin which Ideal for oscillator replacement tri-states the clock output when the OE pin is taken low. Industrial temperature version available This product is intended for clock generation. It has low Advanced, low-power CMOS process output jitter (variation in the output period), but input to output skew and jitter are not defined or guaranteed. For applications which require defined input to output skew, use the ICS570B. Block Diagram VDD 2 S1:0 PLL Clock Multiplier X1/ICLK CLK Circuitry Crystal or Crystal and ROM Clock input Oscillator X2 Optional crystal capacitors OE GND IDT LOCO PLL CLOCK MULTIPLIER 1 ICS501B REV G 011012ICS501B LOCO PLL CLOCK MULTIPLIER CLOCKMULTIPLIER Pin Assignment Clock Output Table S1 S0 CLK Minimum Input 0 0 4X input 0.5 MHz X1/ICLK 1 8 X2 0 M 5.3125X input 1 MHz VDD 2 7 OE 0 1 5X input 0.5 MHz M 0 6.25X input 0.5 MHz GND 3 6 S0 M M 2X input 1 MHz S1 4 5 CLK M 1 3.125X input 1 MHz 1 0 6X input 0.5MHz 8 Pin (150 mil) SOIC 1 M 3X input 0.5MHz 1 1 8X input 0.5MHz 0 = connect directly to ground 1 = connect directly to VDD M = leave unconnected (floating) Pin Descriptions Pin Pin Pin Pin Description Number Name Type 1 XI/ICLK Input Crystal connection or clock input. 2 VDD Power Connect to +3.3 V or +5 V. 3 GND Power Connect to ground. 4 S1 Tri-level Iinput Select 1 for output clock. Connect to GND or VDD or float. 5 CLK Output Clock output per table above. 6 S0 Tri-level Input Select 0 for output clock. Connect to GND or VDD or float. 7 OE Input Output enable. Tri-states CLK output when low. Internal pull-up. 8 X2 Output Crystal connection. Leave unconnected for clock input. IDT LOCO PLL CLOCK MULTIPLIER 2 ICS501B REV G 011012