DATASHEET LOCO PLL CLOCK MULTIPLIER ICS511 Description Features TM The ICS511 LOCO is the most cost effective way to Packaged as 8-pin SOIC or die generate a high quality, high frequency clock output Pb (lead) free package from a lower frequency crystal or clock input. The name Upgrade of popular ICS501 with: LOCO stands for Low Cost Oscillator, as it is designed - changed multiplier table to replace crystal oscillators in most electronic - faster operating frequencies systems. Using Phase-Locked Loop (PLL) techniques, - output duty cycle at VDD/2 the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 200 Zero ppm multiplication error MHz. Input crystal frequency of 5 - 27 MHz Input clock frequency of 2 - 50 MHz Stored in the chips ROM is the ability to generate nine different multiplication factors, allowing one chip to Output clock frequencies up to 200 MHz output many common frequencies (see table on page Extremely low jitter of 25 ps (one sigma) 2). Compatible with all popular CPUs The device also has an output enable pin which Duty cycle of 45/55 up to 200 MHz tri-states the clock output when the OE pin is taken low. Mask option for nine selectable frequencies This product is intended for clock generation. It has low Operating voltage of 3.3 V or 5 V output jitter (variation in the output period), but input to Tri-state output for board level testing output skew and jitter are not defined nor guaranteed. Industrial temperature version available For applications which require defined input to output Advanced, low power CMOS process skew, use the ICS570B. Block Diagram VDD 2 S1:0 PLL Clock Multiplier X1/ICLK CLK Circuitry Crystal or Crystal and ROM Clock input Oscillator X2 Optional crystal capacitors OE GND IDT / ICS LOCO PLL CLOCK MULTIPLIER 1 ICS511 REV K 051310ICS511 LOCO PLL CLOCK MULTIPLIER CLOCKMULTIPLIER Pin Assignment Clock Output Table S1 S0 CLK 0 0 4X input X1/ICLK 1 8 X2 0 M 5.333X input VDD 2 7 OE 0 1 5X input M 0 2.5X input GND 3 6 S0 M M 2X input S1 4 5 CLK M 1 3.333X input 1 0 6X input 8 Pin (150 mil) SOIC 1 M 3X input 1 1 8X input 0 = connect directly to ground 1 = connect directly to VDD M = leave unconnected (floating) Common Output Frequency Examples (MHz) Output 20 24 30 32 33.33 37.5 40 48 50 60 64 Input 10 12 10 16 16.66 15 10 12 20 10 16 Selection (S1, S0) M, M M, M 1, M M, M M, M M, 0 0, 0 0, 0 M, 0 1, 0 0, 0 Output 66.66 72 75 80 83.33 90 100 120 125 133.3 150 Input 20 12 25 10 25 15 20 15 25 25 25 Selection (S1, S0) M, 1 1, 0 1, M 1, 1 M, 1 1, 0 0, 1 1, 1 0, 1 0, M 1, 0 Pin Descriptions Pin Pin Pin Pin Description Number Name Type 1 XI/ICLK Input Crystal connection or clock input. 2 VDD Power Connect to +3.3 V or +5 V. 3 GND Power Connect to ground. 4 S1 Tri-level Iinput Select 1 for output clock. Connect to GND or VDD or float. 5 CLK Output Clock output per table above. IDT / ICS LOCO PLL CLOCK MULTIPLIER 2 ICS511 REV K 051310