650R-01ILF Renesas

DATASHEET SYSTEM PERIPHERAL CLOCK SOURCE ICS650-01 Description Features The ICS650-01 is a low-cost, low-jitter, high-performance Packaged in 20-pin SSOP (QSOP) clock synthesizer for system peripheral applications. Using Pb (lead) free package analog/digital Phase-Locked Loop (PLL) techniques, the Operating voltage of 3.3 V or 5 V device accepts a parallel resonant 14.31818 MHz crystal input to produce up to eight output clocks. The device Less than one ppm synthesis error in all clocks provides clocks for PCI, SCSI, Fast Ethernet, Ethernet, Inexpensive 14.31818 MHz crystal or clock input USB, and AC97. The user can select one of three USB Provides Ethernet and Fast Ethernet clocks frequencies and also one of two AC97 audio frequencies. The OE pin puts all outputs into a high impedance state for Provides SCSI clocks board level testing. All frequencies are generated with less Provides PCI clocks than one ppm error, meeting the demands of SCSI and Selectable AC97 audio clock Ethernet clocking. Selectable USB clock OE pin tri-states the outputs for testing Selectable frequencies on three clocks Duty cycle of 40/60 Advanced, low-power CMOS process Industrial temperature range available Block Diagram VDD 3 2 4 Processor PSEL1:0 Clocks ASEL Audio Clock Clock USEL Synthesis Circuitry USB Clock 14.31818 MHz Crystal or Clock 20 MHz X1/ICLK Crystal 14.31818 MHz Oscillator X2 2 OE (all outputs) GND IDT / ICS SYSTEM PERIPHERAL CLOCK SOURCE 1 ICS650-01 REV H 051310ICS650-01 SYSTEM PERIPHERAL CLOCK SOURCE CLOCKSYNTHESIZER Pin Assignment Processor Clock (MHz) 1 20 PSEL1 PSEL1 PSEL0 PCLK1 PCLK2, 3 PCLK4 USEL X2 2 19 PSEL0 0 0 25 50 18.75 3 18 PCLK2 X1/ICLK 0 M TEST TEST TEST VDD 4 17 PCLK3 0 1 TEST TEST TEST VDD 5 16 VDD M 0 40 80 20 GND 6 15 ASEL M M 33.3334 66.6667 25 UCLK 7 14 GND M 1 20 40 25 20M 8 13 14.318M 1 0 20 33.3334 25 ACLK 9 12 PCLK1 1 M 20 66.6667 25 PCLK4 10 11 OE 1 1 Stops low all clocks except 20M 20 pin (150 mil) SSOP Audio Clock (MHz) USB Clock (MHz) ASEL ACLK 0 49.152 USEL UCLK M 24.576 012 1 12.288 M24 148 0 = connect directly to ground 1 = connect directly to VDD M = leave unconnected (floating) Pin Descriptions Pin Pin Pin Pin Description Number Name Type 1 USEL Input UCLK select pin. Determines frequency of USB clock per table above. 2 X2 XO Crystal connection. Connect to parallel mode 14.31818 MHz crystal. Leave open for clock. 3 X1/ICLK XI Crystal connection. Connect to parallel mode 14.31818 MHz crystal or clock. 4 VDD Power Connect to VDD. Must be same value as other VDD. Decouple with pin 6. 5 VDD Power Connect to VDD. Must be same value as other VDD. 6 GND Power Connect to ground. 7 UCLK Output USB clock output per table above. 8 20M Output Fixed 20 MHz output for Ethernet. Only clock that runs when PSEL1=PSEL0=1. 9 ACLK Output AC97 audio clock output per table above. 10 PCLK4 Output PCLK output number 4 per table above. IDT / ICS SYSTEM PERIPHERAL CLOCK SOURCE 2 ICS650-01 REV H 051310