82P33931-1BAG Renesas

Synchronization System 82P33931 / 82P33931-1 for IEEE 1588 Datasheet HIGHLIGHTS APPLICATIONS System implements ITU-T telecom profiles Access routers, edge routers, core routers Composed of IDTs IEEE 1588 software and IDTs Synchronization Carrier Ethernet switches Management Unit (SMU) hardware Multiservice access platforms Operates as IEEE 1588 / PTP slave PON OLT Recovers accurate and stable synchronization signals from packet LTE eNodeB based IEEE 1588 / PTP master ITU-T G.8265.1 & G.8275.1 Telecom Profile clock synthesizer Provides integrated physical layer frequency support ITU-T G.8273.2 Telecom Boundary Clock (T-BC) and Telecom Operates as an IEEE 1588 / PTP master Time Slave Clock (T-TSC) ITU-T G.8264 Synchronous Equipment Timing Source (SETS) ITU-T G.8263 Packet-based Equipment Clock (PEC) SOFTWARE ITU-T G.8262 Synchronous Ethernet Equipment Clock (EEC) C99 source code distribution, supporting POSIX-based Operating Sys- ITU-T G.813 Synchronous Equipment Clock (SEC) tems (OSs) such as Linux Telcordia GR-253-CORE Stratum 3 Clock (S3) and SONET Minimum IEEE 1588 compliant Precision Time Protocol (PTP) stack Clock (SMC) Abstraction interface supports user-supplied IEEE 1588 compliant Pre- cision Time Protocol (PTP) stack Reference trackers filter packet synchronization noise from IEEE 1588 unaware networks HARDWARE Synchronization Management Unit (SMU) provides tools to manage physical layer and packet based synchronous clocks for IEEE 1588 Telecom Profile applications Supports independent IEEE 1588 and Synchronous Ethernet (SyncE) timing paths Combo mode provides SyncE physical layer frequency support for IEEE 1588 Telecom Boundary Clocks (T-BC) and Telecom Time Slave Clocks (T-TSC) per G.8273.2 Digital PLLs can be configured as Digitally Controlled Oscillators (DCOs) for IEEE 1588 clock synthesis Generates G.8262 compliant SyncE clocks Fractional-N input dividers support a wide range of reference frequen- cies Locks to 1 pulse per second (PPS) references from GPS based sources Loads configuration from an external EPROM after reset 2017 Integrated Device Technology, Inc. 0 April 5, 201782P33931-1 Datasheet DESCRIPTION IEEE 1588-2008 Precision Time Protocol (PTP) is a packet-based syn- System Component Documentation chronization mechanism used in packet-switched networks. PTP synchro- The detailed characteristics of the 82P33931-1 software and hardware nizes the clocks of different devices with the most accurate clock on the components are described in other documents as shown in Table 2 and network usually a precise, grandmaster clock, such as one using a Pri- Table 3. mary Reference Time Clock (PRTC) time signal. The 82P33931-1 is a soft- ware and hardware system that can operate as a PTP slave or PTP master. As a PTP slave the 82P33931-1 recovers accurate and stable Table 2: Software Documentation electrical synchronization signals from a packet based reference gener- Software System Component Software Documentation ated by a PTP master. As a PTP master the 82P33931-1 can lock to a sta- ble electrical clock source and generate packet based PTP references for 82P33931-1 IEEE 1588 software Please contact IDT downstream PTP slaves The 82P33931-1 is available with several software and hardware options. The software options are outlined in Table 1 by root part number. The Table 3: SMU Hardware Documentation hardware options depend on the choice of Synchronization Management Root Part Number Documentation Unit (SMU) hardware the SMU hardware documentation is listed in Table 3 by root part number. 82P33931 82P33831 datasheet 82P33931-1 Table 1: Software Options by Root Part Number Root Part Number Included Software 82P33931 IDT clock recovery servo software 82P33931-1 IDT clock recovery servo software IEEE 1588 Protocol Stack 2017 Integrated Device Technology, Inc. 1 April 5, 2017