QUAD CHANNEL T1/E1/J1 IDT82V2044E SHORT HAUL LINE INTERFACE UNIT FEATURES: Four channel T1/E1/J1 short haul line interfaces - High impedance setting for line drivers Supports HPS (Hitless Protection Switching) for 1+1 protection - PRBS (Pseudo Random Bit Sequence) generation and detection 15 without external relays with 2 -1 PRBS polynomials for E1 Programmable T1/E1/J1 switchability allowing one bill of ma- - QRSS (Quasi Random Sequence Signals) generation and detection terial for any line condition 20 with 2 -1 QRSS polynomials for T1/J1 Single 3.3 V power supply with 5 V tolerance on digital interfaces - 16-bit BPV (Bipolar Pulse Violation)/Excess Zero/PRBS or QRSS Meets or exceeds specifications in error counter - ANSI T1.102, T1.403 and T1.408 - Analog loopback, Digital loopback, Remote loopback and Inband - ITU I.431, G.703,G.736, G.775 and G.823 loopback - ETSI 300-166, 300-233 and TBR 12/13 Adaptive receive sensitivity up to -20 dB - AT&T Pub 62411 Non-intrusive monitoring per ITU G.772 specification Per channel software selectable on: Short circuit protection for line drivers - Wave-shaping templates LOS (Loss Of Signal) detection with programmable LOS levels - Line terminating impedance (T1:100 , J1:110 , E1:75 /120 ) AIS (Alarm Indication Signal) detection - Adjustment of arbitrary pulse shape JTAG interface - JA (Jitter Attenuator) position (receive path or transmit path) Supports serial control interface, Motorola and Intel Non-Multi- - Single rail/dual rail system interfaces plexed interfaces - B8ZS/HDB3/AMI line encoding/decoding Package: - Active edge of transmit clock (TCLK) and receive clock (RCLK) IDT82V2044E: 128-pin TQFP - Active level of transmit data (TDATA) and receive data (RDATA) - Receiver or transmitter power down DESCRIPTION: The IDT82V2044E can be configured as a quad T1, quad E1 or quad and both serial and parallel control interfaces. To facilitate the network J1 Line Interface Unit. The IDT82V2044E performs clock/data recovery, maintenance, a PRBS/QRSS generation/detection circuit is integrated in AMI/B8ZS/HDB3 line decoding and detects and reports the LOS condi- each channel, and different types of loopbacks can be set on a per channel tions. An integrated Adaptive Equalizer is available to increase the receive basis. Four different kinds of line terminating impedance, 75, 100 , 110 sensitivity and enable programming of LOS levels. In transmit path, there and 120 are selectable on a per channel basis. The chip also provides is an AMI/B8ZS/HDB3 encoder and Waveform Shaper. There is one Jitter driver short-circuit protection and supports JTAG boundary scanning. Attenuator for each channel, which can be placed in either the receive path The IDT82V2044E can be used in SDH/SONET, LAN, WAN, Routers, or the transmit path. The Jitter Attenuator can also be disabled. The Wireless Base Stations, IADs, IMAs, IMAPs, Gateways, Frame Relay IDT82V2044E supports both Single Rail and Dual Rail system interfaces Access Devices, CSU/DSU equipment, etc. The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGES August 2004 1 2003 Integrated Device Technology, Inc. All rights reserved. DSC-6533/-INDUSTRIAL QUAD CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT TEMPERATURE RANGES FUNCTIONAL BLOCK DIAGRAM TDO TDI TMS TCK TRST RST REF THZ SCLKE INT/MOT P/S A 7:0 D 7:0 INT SDO SDI/R/W/WR DS/RD SCLK CS MCLKS MCLK Figure-1 Block Diagram 2 One of the Four Identical Channels LOS/AIS LOSn Detector Receiver RCLKn B8ZS/ Clock and RTIPn Jitter Data Adaptive RDn/RDPn Internal HDB3/AMI Data Attenuator Slicer Equalizer Termination RRINGn CVn/RDNn Decoder Recovery PRBS Detector Analog Digital Remote IBLC Detector Loopback Loopback Loopback B8ZS/ TTIPn TCLKn Transmitter Jitter Waveform Line TDn/TDPn HDB3/AMI Internal Attenuator Shaper Driver Encoder TRINGn TDNn Termination PRBS Generator IBLC Generator TAOS VDDD Microprocessor G.772 Clock Basic JTAG TAP VDDIO Interface Monitor Generator Control VDDA VDDT VDDR