851010AYILF Renesas

ICS851010I 1-to-10, Differential HCSL Fanout Buffer DATA SHEET General Description Features The ICS851010I is a 1-to-10 Differential HCSL Fanout Buffer. The Ten differential HCSL outputs ICS851010I is designed to translate any differential signal levels to Translates any differential input signal (LVPECL, LVHSTL, LVDS, differential HCSL output levels. An external reference resistor is HCSL) to HCSL levels without external bias networks used to set the value of the current supplied to an external load. The Maximum output frequency: 250MHz load resistor value is chosen to equal the value of the characteristic Output skew: 165ps (maximum) line impedance of 50. The ICS851010I is characterized at an Output drift: 140ps (maximum) operating supply voltage of 3.3V. V : 850mV (maximum) The differential HCSL outputs, accurate crossover voltage and OH symmetric duty cycle makes the ICS851010I ideal for interfacing to Additive phase jitter, RMS: 0.19ps (typical) PCI Express and FBDIMM applications. Full 3.3V supply voltage Available in lead-free (RoHS 6) package -40C to 85C ambient operating temperature Block Diagram Pin Assignment CLK nCLK 32 31 30 29 28 27 26 25 Q0 Q9 Q0 1 nQ0 nQ9 24 nQ7 Q8 Q1 2 nQ0 23 Q7 nQ8 nQ1 VDD 3 VDD 22 Q2 Q7 4 nQ6 Q1 21 nQ2 nQ7 nQ1 Q6 5 20 Q3 Q6 nQ3 nQ6 Q2 6 nQ5 19 Q5 Q4 nQ2 7 Q5 18 nQ5 nQ4 VDD 8 VDD 17 9 10 11 12 13 14 15 16 IREF ICS851010I 32-Lead TQFP, E-Pad 7mm x 7mm x1mm package body Y Package Top View ICS851010AYI REVISION A AUGUST 2, 2010 1 2010 Integrated Device Technology, Inc. GND nQ9 IREF Q9 Q3 VDD nQ3 nQ8 VDD Q8 VDD nCLK Q4 CLK nQ4 GNDICS851010I Data Sheet 1-to-10 DIFFERENTIAL HCSL FANOUT BUFFER Table 1. Pin Descriptions Number Name Type Description 1, 2 Q0, nQ0 Output Differential output pair. Differential HCSL interface levels. 3, 8, 13, 14, V Power Positive supply pins. DD 17, 22, 30 4, 5 Q1, nQ1 Output Differential output pair. Differential HCSL interface levels. 6, 7 Q2, nQ2 Output Differential output pair. Differential HCSL interface levels. 9, 25 GND Power Power supply ground. 10 IREF Input Reference current input. Used to set the output current. Connect to 950 resistor to ground. 11, 12 Q3, nQ3 Output Differential output pair. Differential HCSL interface levels. 15, 16 Q4, nQ4 Output Differential output pair. Differential HCSL interface levels. 18, 19 Q5, nQ5 Output Differential output pair. Differential HCSL interface levels. 20, 21 Q6, nQ6 Output Differential output pair. Differential HCSL interface levels. 23, 24 Q7, nQ7 Output Differential output pair. Differential HCSL interface levels. 26 CLK Input Non-inverting differential input. 27 nCLK Input Inverting differential clock input. 28, 29 Q8, nQ8 Output Differential output pair. Differential HCSL interface levels. 31, 32 Q98, nQ9 Output Differential output pair. Differential HCSL interface levels. Output Driver Current The ICS851010I outputs are HCSL differential current drive with the current being set with a resistor from I to ground. REF For a single load and a 50 pc board trace, the drive current would typically be set with a R of 950 which products an I of REF REF 1.16mA. The I is multiplied by a current mirror to an output drive of IREF REF 12*1.16mA or 13.90mA. See Figure 1 for current mirror and output drive details. RREF RL RL 950 Figure 1. HCSL Current Mirror and Output Drive ICS851010AYI REVISION A AUGUST 2, 2010 2 2010 Integrated Device Technology, Inc.