DATA SHEET ICS8535-31 Integrated ICS8535-31 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS- Circuit LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ Systems, Inc. TO-3.3V LVPECL FANOUT BUFFER LVCMOS-TO-3.3V LVPECL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS8535-31 is a low skew, high performance 4 differential 3.3V LVPECL outputs ICS 1-to-4 3.3V Crystal Oscillator/LVCMOS-to-3.3V Selectable LVCMOS/LVTTL CLK or crystal inputs HiPerClockS LVPECL fanout buffer and a member of the HiPerClock S family of High Perfor mance Clock CLK can accept the following input levels: LVCMOS, LVTTL Solutions from ICS. The ICS8535-31 has select- Maximum output frequency: 266MHz able single ended clock or crystal inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and Output skew: 30ps (maximum) translate them to 3.3V LVPECL levels. The output enable is Part-to-part skew: 200ps (maximum) internally synchronized to eliminate runt pulses on the out- puts during asynchronous assertion/deassertion of the clock Propagation delay: 1.65ns (maximum) enable pin. Additive phase jitter, RMS: 0.057ps (typical) Guaranteed output and part-to-part skew characteristics 3.3V operating supply make the ICS8535-31 ideal for those applications demand- ing well defined performance and repeatability. 0C to 70C ambient operating temperature Lead-Free package fully RoHS compliant Industrial Temperature information available upon request Replaces the ICS8535-11 BLOCK DIAGRAM PIN ASSIGNMENT Pullup CLK EN D 1 20 VEE Q0 Q CLK EN 2 19 nQ0 LE 3 18 CLK SEL VCC CLK 4 17 Q1 Pulldown CLK 0 nc 5 16 nQ1 15 XTAL IN 6 Q2 Q0 7 14 XTAL OUT nQ2 XTAL IN nQ0 nc 8 13 VCC OSC 1 nc 9 12 Q3 Q1 10 11 XTAL OUT VCC nQ3 nQ1 Pulldown CLK SEL Q2 ICS8535-31 nQ2 20-Lead TSSOP 6.5mm x 4.4mm x 0.92mm package body Q3 G Package nQ3 Top View 8535AG-31 www.icst.com/products/hiperclocks.html REV. B APRIL 29, 2005 IDT / ICS LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER ICS8535-31 1 1ICS8535-31 Integrated ICS8535-31 Circuit LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER TSD Systems, Inc. LVCMOS-TO-3.3V LVPECL FANOUT BUFFER TABLE 1. PIN DESCRIPTIONS NeumberNeam Tnyp Descriptio 1VP.ower Negative supply pin EE Synchronizing clock enable. When HIGH, clock outputs follows clock 2NCtLK E Ipnpu Pullu input. When LOW, Q outputs are forced low, nQ outputs are forced high. LVCMOS / LVTTL interface levels. Clock select input. When HIGH, selects XTAL inputs. 3LCtLK SEInnpu Pulldow When LOW, selects CLK input. LVCMOS / LVTTL interface levels. 4KCtL InnpuP.ulldow Clock input. LVCMOS / LVTTL interface levels 5c, 8, 9 ndU.nuse No connect 6, XTAL IN, Crystal oscillator interface. XTAL IN is the input. Input 7 XTAL OUT XTAL OUT is the output. 1V0, 13, 18 P.ower Positive supply pins CC 131, 12ntQ3, QO.utpu Differential clock outputs. LVPECL interface levels 124, 15ntQ2, QO.utpu Differential clock outputs. LVPECL interface levels 116, 17ntQ1, QO.utpu Differential clock outputs. LVPECL interface levels 109, 20ntQ0, QO.utpu Differential clock outputs. LVPECL interface levels NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS SrymbolPsaramete Tmest Condition MlinimuTmypicaMsaximu Unit C Input Capacitance 4Fp IN R Input Pullup Resistor 5k1 PULLUP R Input Pulldown Resistor 5k1 PULLDOWN 8535AG-31 www.icst.com/products/hiperclocks.html REV. B APRIL 29, 2005 2 IDT / ICS LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER ICS8535-31 2