Low Skew, 1-to-8, Crystal 8538-31 Oscillator/LVCMOS-TO-3.3V LVPECL Fanout Buffer DATA SHEET General Description Features The 8538-31 is a low skew, high performance 1-to-8 Crystal Eight differential 3.3V LVPECL outputs Oscillator/LVCMOS-to-3.3V LVPECL Fanout Buffer. The 8538-31 Selectable LVCMOS/LVTTL clock or crystal inputs has selectable single ended clock or crystal inputs. The single ended CLK can accept the following input levels: LVCMOS, LVTTL clock input accepts LVCMOS or LVTTL input levels and translate Maximum output frequency: 266MHz them to 3.3V LVPECL levels. The output enable is internally synchronized to eliminate runt pulses on the outputs during Crystal frequency range: 14MHz - 40MHz asynchronous assertion/deassertion of the clock enable pin. Output skew: 50ps (maximum) Guaranteed output and part-to-part skew characteristics make the Part-to-part skew: 250ps (maximum) 8538-31 ideal for those applications demanding well defined Propagation delay: 2.2ns (maximum) performance and repeatability. 3.3V operating supply mode 0C to 70C ambient operating temperature Industrial temperature information available upon request Available in lead-free (RoHS 6) package Block Diagram Pin Assignment CLK 1 28 VCC Pullup CLK EN D CLK SEL 2 27 XTAL IN Q CLK EN 3 26 XTAL OUT LE VEE 4 25 VEE Pulldown CLK 0 nQ7 Q0 Q0 5 24 nQ0 Q7 6 23 nQ0 XTAL IN VCCO 7 22 VCCO OSC 1 Q1 nQ6 Q1 8 21 nQ1 Q6 9 20 nQ1 XTAL OUT nQ5 10 19 Q2 Q2 Q5 nQ2 11 18 nQ2 Pulldown CLK SEL VEE 12 17 VCCO Q3 nQ4 Q3 13 16 nQ3 Q4 14 15 nQ3 Q4 28-Lead TSSOP, 173MIL nQ4 4.4mm x 9.7mm x 0.925mm package body Q5 G Package nQ5 Top View Q6 nQ6 Q7 nQ7 8538-31 Rev B 7/10/15 1 2015 Integrated Device Technology, Inc.8538-31 DATA SHEET Table 1. Pin Descriptions Number Name Type Description 1 CLK Input Pulldown Single-ended clock input. LVCMOS/LVTTL interface levels. 2 CLK SEL Input Pulldown 3 CLK EN Input Pullup 4, 12, 25 V Power Negative supply pins. EE 5, 6 Output Differential output pair. LVPECL interface levels. nQ7, Q7 7, 17, 22 V Power Output supply pins. CCO 8, 9 Output Differential output pair. LVPECL interface levels. nQ6, Q6 10, 11 Output Differential output pair. LVPECL interface levels. nQ5, Q5 13, 14 Output Differential output pair. LVPECL interface levels. nQ4, Q4 15, 16 Output Differential output pair. LVPECL interface levels. nQ3, Q3 18, 19 Output Differential output pair. LVPECL interface levels. nQ2, Q2 20, 21 Output Differential output pair. LVPECL interface levels. nQ1, Q1 23, 24 Output Differential output pair. LVPECL interface levels. nQ0, Q0 26, XTAL OUT Input Crystal oscillator interface. XTAL IN is the input, XTAL OUT is the output. 27 XTAL IN 28 V Power Positive supply pin. CC NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Symbol Parameter Test Conditions Minimum Typical Maximum Units C Input Capacitance 4 pF IN R Input Pullup Resistor 51 k PULLUP R Input Pulldown Resistor 51 k PULLDOWN Rev B 7/10/15 2 LOW SKEW, 1-TO-8, CRYSTAL OSCILLATOR/LVCMOS-TO-3.3V LVPECL FANOUT BUFFER