VEE nPCLK4 8:1 Differential-to-3.3V or 2.5V 853S058 LVPECL/ECL Clock Multiplexer DATA SHEET General Description Features The 853S058 is an 8:1 Differential-to-3.3V or 2.5V LVPECL / ECL High speed 8:1 differential muliplexer Clock Multiplexer which can operate up to 2.5 GHz. The 853S058 One differential 3.3V or 2.5V LVPECL output pair has 8 differential selectable clock inputs. The PCLK, nPCLK input pairs can accept LVPECL, LVDS, SSTL or CML levels. The fully Eight selectable differential PCLKx, nPCLKx input pairs differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal Differential PCLKx, nPCLKx pairs can accept the following pulldown resistors. The SEL2 pin is the most significant bit and the interface levels: LVPECL, LVDS, SSTL,CML binary number applied to the select pins will select the same Maximum output frequency: 2.5GHz numbered data input (i.e., 000 selects PCLK0, nPCLK0). Translates any single ended input signal to LVPECL levels with resistor bias on nPCLKx input Additive phase jitter, RMS: 0.075ps (typical) Part-to-part skew: 350ps (maximum) Propagation delay: 600ps (maximum) LVPECL mode operating voltage supply range: V = 2.375V to 3.465V, V = 0V CC EE ECL mode operating voltage supply range: V = 0V, V = -3.465V to -2.375V CC EE -40C to 85C ambient operating temperature Available in lead-free (RoHS 6) package Block Diagram Pin Assignment 1 24 PCLK7 Pulldown PCLK0 PCLK0 nPCLK0 2 23 nPCLK7 Pullup/Pulldown 0 0 0 nPCLK0 (default) PCLK1 3 22 PCLK6 Pulldown PCLK1 nPCLK1 4 21 nPCLK6 Pullup/Pulldown 0 0 1 nPCLK1 V 5 20 VCC CC 6 19 Q SEL0 Pulldown PCLK2 SEL1 7 18 nQ Pullup/Pulldown 0 1 0 nPCLK2 SEL2 8 17 PCLK2 9 16 PCLK5 Pulldown PCLK3 nPCLK2 10 15 nPCLK5 Pullup/Pulldown 0 1 1 nPCLK3 PCLK3 PCLK4 11 14 Q nPCLK3 12 13 Pulldown PCLK4 nQ Pullup/Pulldown 1 0 0 nPCLK4 853S058 Pulldown PCLK5 24-Lead TSSOP, 173-MIL 1 0 1 Pullup/Pulldown nPCLK5 4.4mm x 7.8mm x 0.925mm Pulldown PCLK6 package body Pullup/Pulldown 1 1 0 nPCLK6 G Package Top View Pulldown PCLK7 Pullup/Pulldown 1 1 1 nPCLK7 Pulldown SEL2 Pulldown SEL1 Pulldown SEL0 853S058 REVISION B 1/6/15 1 2015 Integrated Device Technology, Inc.853S058 DATA SHEET Pin Descriptions and Pin Characteristics Tables Table 1. Pin Descriptions Number Name Type Description 1 PCLK0 Input Pulldown Non-inverting differential clock input. Pullup/ 2 nPCLK0 Input Inverting differential clock input. V /2 default when left floating. CC Pulldown 3 PCLK1 Input Pulldown Non-inverting differential clock input. Pullup/ 4 nPCLK1 Input Inverting differential clock input. V /2 default when left floating. CC Pulldown 5, 20 V Power Positive supply pins. CC SEL0, SEL1, 6, 7, 8 Input Pulldown Clock select input pins. LVCMOS/LVTTL interface levels. SEL2 9 PCLK2 Input Pulldown Non-inverting differential clock input. Pullup/ 10 nPCLK2 Input Inverting differential clock input. V /2 default when left floating. CC Pulldown 11 PCLK3 Input Pulldown Non-inverting differential clock input. Pullup/ 12 nPCLK3 Input Inverting differential clock input. V /2 default when left floating. CC Pulldown Pullup/ 13 nPCLK4 Input Inverting differential clock input. V /2 default when left floating. CC Pulldown 14 PCLK4 Input Pulldown Non-inverting differential clock input. Pullup/ 15 nPCLK5 Input Inverting differential clock input. V /2 default when left floating. CC Pulldown 16 PCLK5 Input Pulldown Non-inverting differential clock input. 17 V Power Negative supply pin. EE 18, 19 nQ, Q Output Differential output pair. LVPECL interface levels. Pullup/ 21 nPCLK6 Input Inverting differential clock input. V /2 default when left floating. CC Pulldown 22 PCLK6 Input Pulldown Non-inverting differential clock input. Pullup/ 23 nPCLK7 Input Inverting differential clock input. V /2 default when left floating. CC Pulldown 24 PCLK7 Input Pulldown Non-inverting differential clock input. NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Symbol Parameter Test Conditions Minimum Typical Maximum Units C Input Capacitance 2 pF IN R Pulldown Resistor 75 k PULLDOWN R /2 RPullup/Pulldown Resistor 50 k VCC 8:1 DIFFERENTIAL-TO-3.3V OR 2.5V LVPECL/ECL 2 REVISION B 1/6/15 CLOCK MULTIPLEXER