Differential-to-LVDS Fanout Buffer w/Divider ICS854S1208I and Glitchless Switch DATA SHEET General Description Features The ICS854S1208I is a low skew, 8 output LVDS Fanout Buffer with Eight differential LVDS output pairs Each output has individual synchronous output enable selectable divider. The ICS854S1208I has 2 selectable inputs that accept a variety of differential input types. The device provides the Two selectable differential CLKx, nCLKx input pairs capability to suppress any glitch at the outputs of the device during CLKx, nCLKx pairs can accept the following differential an input clock switch to enhance clock redundancy in fault tolerant input levels: LVPECL, LVDS, HCSL applications. Maximum output frequency: 1.5GHz The divide select inputs, DIV SELA and DIV SELB, control the Independent bank control for 1 or 2 operation output frequency of each bank. The output banks can be Glitchless output behavior during input switch independently selected for 1 or 2 operation. The output enable Output skew: 40ps (maximum) pins assigned to each output, support enabling and disabling each output individually. Bank skew: 35ps (maximum) The ICS854S1208I is characterized at full 3.3V or 2.5V output Full 3.3V or 2.5V supply mode operating supply modes. Guaranteed output and part-to-part skew -40C to 85C ambient operating temperature characteristics make the ICS854S1208I ideal for high performance Available in lead-free (RoHS 6) package applications. Supply Mode Operation Table Pin Assignment 3.3V Operation 2.5V Operation V = 3.3V V = 2.5V DD DD V = Float V = 2.5V TAP TAP 48 47 46 45 44 43 42 41 40 39 38 37 VDD 1 36 VDD DIV SELA 2 OEB0 35 VTAP 3 OEB1 34 CLK0 4 33 OEB2 nCLK0 5 32 OEB3 GND GND 6 31 CLK SEL 7 VDD 30 nCLK1 OEA3 8 29 CLK1 9 OEA2 28 GND 10 OEA1 27 DIV SELB 11 OEA0 26 VDD 12 VDD 25 13 14 15 16 17 18 19 20 21 22 23 24 ICS854S1208I 48-Pin TQFP, E-Pad 7mm x 7mm x 1mm package body Y Package Top View ICS854S1208AYI REVISION A APRIL 27, 2012 1 2012 Integrated Device Technology, Inc. GND GND QA0 QA2 nQA0 nQA2 QA1 QA3 nQA1 nQA3 VDD VDD VDD VDD nQB1 nQB3 QB1 QB3 nQB0 nQB2 QB0 QB2 GND GNDICS854S1208I Data Sheet DIFFERENTIAL-TO-LVDS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH Block Diagram V TAP QA0 Pulldown DIV SELA nQA0 Pullup OEA0 QA1 Pulldown CLK0 0 1 0 nQA1 Pullup/Pulldown nCLK0 Pullup OEA1 QA2 Pulldown CLK1 2 1 nQA2 1 Pullup/Pulldown nCLK1 Pullup OEA2 QA3 Pulldown CLK SEL nQA3 Pullup OEA3 QB0 nQB0 Pullup OEB0 QB1 0 nQB1 Pullup OEB1 QB2 1 nQB2 Pullup OEA2 QB3 nQB3 Pullup OEB3 Pulldown DIV SELB ICS854S1208AYI REVISION A APRIL 27, 2012 2 2012 Integrated Device Technology, Inc.