1:8, LVDS Output Fanout Buffer IDT8SLVD1208I DATA SHEET General Description Features The IDT8SLVD1208I is a high-performance differential LVDS fanout Eight low skew, low additive jitter LVDS output pairs buffer. The device is designed for the fanout of high-frequency, very Two selectable, differential clock input pairs low additive phase-noise clock and data signals. The Differential PCLK, nPCLK pairs can accept the following IDT8SLVD1208I is characterized to operate from a 2.5V power differential input levels: LVDS, LVPECL supply. Guaranteed output-to-output and part-to-part skew Maximum input clock frequency: 2GHz (maximum) characteristics make the IDT8SLVD1208I ideal for those clock LVCMOS/LVTTL interface levels for the control input (input select) distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and eight low skew Output skew: 8ps (typical) outputs are available. The integrated bias voltage reference enables Propagation delay: 255ps (typical) easy interfacing of single-ended signals to the device inputs. The Low additive phase jitter, RMS f = 156.25MHz, V = 1V, REF PP device is optimized for low power consumption and low additive 10kHz - 20MHz: 65fs (typical) phase noise. Maximum device current consumption (I ): 170mA DD 2.5V supply voltage Lead-free (RoHS 6), 28-Lead VFQFN packaging -40C to 85C ambient operating temperature Pin Assignment Q4 22 14 GND nQ4 23 13 nQ0 Q5 24 12 Q0 nQ5 25 11 V REF0 Q6 26 10 nPCLK0 nQ6 27 9 PCLK0 V 28 8 V DD DD IDT8SLVD1208I 28 lead VFQFN 5.0mm x 5.0mm x 0.925mm package body Pad size 3.25mm x 3.25 mm NB Package Top View IDT8SLVD1208NBGI REVISION A MAY 1, 2013 1 2013 Integrated Device Technology, Inc. GND nQ3 Q7 Q3 nQ7 nQ2 Q2 SEL PCLK1 5 17 nQ1 nPCLK1 6 16 Q1 15 V V 7 REF1 1 21 2 20 3 19 4 18 DDIDT8SLVD1208I Data Sheet 1:8, LVDS OUTPUT FANOUT BUFFER Block Diagram VDD Q0 Pulldown PCLK0 nQ0 Pullup + Pulldown nPCLK0 Q1 GND GND nQ1 0 VDD Q2 nQ2 Pulldown PCLK1 1 Pullup + Pulldown nPCLK1 Q3 nQ3 GND GND VDD Q4 nQ4 Pullup + Pulldown SEL Q5 nQ5 GND Q6 V REF0 Reference nQ6 Voltage Generator V REF1 Q7 nQ7 IDT8SLVD1208NBGI REVISION A MAY 1, 2013 2 2013 Integrated Device Technology, Inc.