FemtoClock NG QUAD Universal 8T49N488 Frequency Translator DATA SHEET General Description Features The 8T49N488 is a quad PLL with FemtoClock NG technology, it Fourth generation FemtoClock NG technology integrates low phase noise Frequency Translator / Synthesizer, Jitter Four fully independent PLLs attenuation, and with alarm and monitoring functions suitable for TM Universal Frequency Translator /Frequency Synthesizer and networking and communications applications. The device has four Jitter attenuator fully independent PLLs, each PLL is able to generate any output frequency in the 0.98MHz - 312.5MHz range and most output Outputs are programmable as LVPECL or LVDS frequencies in the 312.5MHz - 1,300MHz range (see Table 3 for Programmable output frequency: 0.98MHz up to 1,300MHz details). A wide range of input reference clocks and operation reference clock may be used as the source for the output frequency. Two differential inputs support the following input levels: Each PLL of 8T49N488 has three operating modes to support a very LVPECL, LVDS, LVHSTL, HCSL broad spectrum of applications: Input frequency range: 8kHz ~ 710MHz Low-Bandwidth 1) Frequency Synthesizer Input frequency range: 16MHz ~ 710MHz High-Bandwidth Synthesizes output frequencies from an external reference REFCLK frequency range: 16MHz ~ 40MHz clock REFCLK. Input clock monitor and alarm Fractional feedback division is used, so there are no Smoothed reference switch requirements for any specific input reference clock frequency to produce the desired output frequency with a high degree of Factory-set register configuration for power-up default state accuracy. Power-up default configuration 2) High-Bandwidth Frequency Translator Configuration customized via One-Time Programmable ROM Applications: PCI Express, Computing, General Purpose 2 Settings may be overwritten after power-up via I C Translates any input clock in the 16MHz - 710MHz frequency 2 I C Serial interface for register programming range into any supported output frequency. RMS phase jitter at 161.1328125MHz,using 40MHz REFCLK This mode has a high PLL loop bandwidth in order to track input (12kHz ~ 20MHz): 465fs (typical), Low Bandwidth Mode (FracN) reference changes, such as Spread-Spectrum Clock modulation. RMS phase jitter at 400MHz,using 40MHz REFCLK (12kHz ~ 20MHz): 333fs (typical), Synthesizer Mode (Integer FB) 3) Low-Bandwidth Frequency Translator Full 2.5V 5% supply mode Applications: Networking & Communications. -40C to 85C ambient operating temperature Translates any input clock in the 8kHz -710MHz frequency range into any supported output frequency. 10mm X 10mm CABGA package This mode supports PLL loop bandwidths in the 10Hz - 580Hz Lead-free (RoHS 6) packaging range and makes use of an external REFCLK to provide significant jitter attenuation. Each PLL provides factory-programmed default power-up configuration burned into One-Time Programmable (OTP) memory. The configuration is specified by customer and are programmed by IDT during the final test phase from an on-hand stock of blank devices. To implement other configurations, these power-up default settings 2 C interface and the can be overwritten after power-up using the I device can be completely reconfigured. 8T49N488 REVISION B 03/23/15 1 2015 Integrated Device Technology, Inc.8T49N488 DATA SHEET Complete Block Diagram REVISION B 03/23/15 2 FEMTOCLOCK NG QUAD UNIVERSAL FREQUENCY TRANSLATOR