DATASHEET DUAL 1 TO 8 BUFFALO CLOCK DRIVER MK74CB218 Description Features The MK74CB218 Buffalo is a monolithic CMOS high Packaged as 28-pin SSOP (150 mil body) speed clock driver. It consists of two identical single input to Pb (lead) free package, RoHS compliant eight low-skew output, non-inverting clock drivers. This Dual one input to eight output clock drivers eliminates concerns of part to part matching in many Outputs are skew matched to within 250 ps systems. The MK74CB218 is packaged in the tiny 28-pin A outputs and B outputs matched to 250 ps SSOP, which uses the same board space as the narrow 16-pin SOIC. The inputs can be connected together for a 1 2.5 V or 3.3 V output voltages to 16 fanout buffer. Output Enable tri-states each bank of eight Clock speeds up to 200 MHz A quad 1 to 4, and PECL versions, are also available. Consult IDT for more details. Family of IDT Parts The MK74CB218 can also act as a voltage translator, since it is possible to run the inputs at 3.3 V and the outputs at The MK74CB218 Buffalo is designed to be used with 2.5 V. IDTs clock synthesizer devices. The inputs of the Buffalo are matched to the outputs of IDT clock synthesizers. Consult IDT for applications support. Not recommended for new designs. See the MK74CB218B for new designs. Block Diagram VDDA VDD VDDB INA INB QA0 QB0 QA1 QB1 QA2 QB2 QA3 QB3 QA4 QB4 QA5 QB5 QA6 QB6 QA7 QB7 OE (all outputs) GND IDT / ICS DUAL 1 TO 8 BUFFALO CLOCK DRIVER 1 MK74CB218 REV K 051310MK74CB218 DUAL 1 TO 8 BUFFALO CLOCK DRIVER FAN OUT BUFFER Suggested Layout Pin Assignment INA 1 28 INB QA0 2 27 QB0 QA1 3 26 A B QB1 25 QA2 4 QB2 0.01 F 0.01 F VDDA 5 24 VDDB G G VDDA 6 23 VDDB QA3 7 22 QB3 0.01 F QA4 8 21 QB4 G GND 9 20 GND V GND 10 19 GND NOTE: 33 ohm series termination resistors for each output are QA5 11 18 QB5 essential for operation. For simplicity, series termination resistors are not shown for QA6 12 17 QB6 the outputs, but should be placed as close to the device as possible. It is most critical to have the 0.01 F decoupling QA7 13 16 QB7 capacitors closest. 14 15 OE VDD A B = connect to VDDA = connect to VDDB V G = connect to VDD = connect to low inductance ground plane Pin Descriptions Pin Pin Pin Pin Description Number Name Type 1 INA Input Clock input for eight A outputs. 2, 3, 4 QA0, QA1, QA2 Output Clock A outputs. 5, 6 VDDA Power Power supply for QA outputs. Connect to a voltage from 2.5 V to VDD. Cannot exceed VDD. 7, 8 QA3, QA4 Output Clock A outputs. 9, 10 GND Power Connect to ground. 11, 12, 13 QA5, QA6, QA7 Output Clock A outputs. 14 OE Input Output Enable. Tri-states all clock outputs when this input is low. Internal pull-up to VDD. 15 VDD Power Power supply for inputs. 16, 17, 18 QB7, QB6, QB5 Output Clock B outputs. 19, 20 GND Power Connect to ground. 21, 22 QB4, QB3 Output Clock B outputs. 23, 24 VDDB Power Power supply for QB outputs. Connect to a voltage from 2.5 V to VDD. Cannot exceed VDD. 25, 26, 27 QB2, QB1, QB0 Output Clock B outputs. 28 INB Input Clock input for eight B outputs. IDT / ICS DUAL 1 TO 8 BUFFALO CLOCK DRIVER 2 MK74CB218 REV K 051310