3.3V, 2.5V, 1:9 LVCMOS Clock Fanout MPC9447 Buffer DATA SHEET PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES SEPTEMBER 7, 2016 The Freescale Semiconductor, Inc. MPC9447 is a 3.3 V or 2.5 V compatible, 1:9 clock fanout buffer targeted for high performance clock tree applications. With output frequencies up to 350 MHz and output skews less than 150 ps, the device meets the needs of most demanding LOW VOLTAGE clock applications. 3.3 V/2.5 V LVCMOS 1:9 Features CLOCK FANOUT BUFFER 9 LVCMOS Compatible Clock Outputs 2 Selectable, LVCMOS Compatible Inputs Maximum Clock Frequency of 350 MHz Maximum Clock Skew of 150 ps Synchronous Output Stop in Logic Low State Eliminates Output Runt Pulses High-Impedance Output Control 3.3 V or 2.5 V Power Supply AC SUFFIX Drives up to 18 Series Terminated Clock Lines 32-LEAD LQFP PACKAGE Pb-FREE PACKAGE Ambient Temperature Range -40 C to +85C CASE 873A-03 32-Lead LQFP Packaging, Pb-free Supports Clock Distribution in Networking, Telecommunications, and Computer Applications Pin and Function Compatible to MPC947 For drop in replacement use 83947AYILN Functional Description MPC9447 is specifically designed to distribute LVCMOS compatible clock signals up to a frequency of 350 MHz. Each output provides a precise copy of the input signal with a near zero skew. The outputs buffers support driving of 50 terminated transmission lines on the incident edge. Each is capable of driving either one parallel terminated or two series terminated transmission lines. Two selectable independent LVCMOS compatible clock inputs are available, providing support of redundant clock source systems. The control is synchronous to the falling edge of the input clock. It allows the start and stop of the output clock signal only MPC9447 CLK STOP in a logic low state, and thus, eliminates potential output runt pulses. Applying the OE control will force the outputs into high-impedance mode. All inputs have an internal pull-up or pull-down resistor preventing unused and open inputs from floating. The device supports a 2.5 V or 3.3 V power supply and an ambient temperature range of -40 C to +85C. The MPC9447 is pin and function compatible but performance-enhanced to the MPC947. MPC9447 REVISION 9 3/15/16 1 2016 Integrated Device Technology, Inc.MPC9447 DATA SHEET V CC Q0 CCLK0 0 CLK 24 23 22 21 20 19 18 17 Q1 Stop 1 CCLK1 25 16 GND GND Q2 V CC 26 15 Q6 Q2 25k Q3 27 14 V V CC CC CLK SEL Q4 28 13 Q7 Q1 V CC MPC9447 GND 29 12 GND 25k Q5 SYNC CLK STOP 30 11 Q8 Q0 Q6 31 10 V CC V CC Q7 32 9 GND GND V CC Q8 12 3 4 5 6 78 (All input resistors have a value of 25 k) OE Figure 1. Logic Diagram Figure 2. 32-Lead Pinout (Top View) Table 1. Function Table Control Default 0 1 CLK SEL 1 CLK0 input selected CLK1 input selected (1) OE 1 Outputs disabled (high-impedance state) Outputs enabled CLK STOP 1 Outputs synchronously stopped in logic low state Outputs active 1. OE = 0 will high-impedance tristate all outputs independent on CLK STOP. Table 2. Pin Configurations Pin I/O Type Function CCLK0 Input LVCMOS Clock Signal Input CCLK1 Input LVCMOS Alternative Clock Signal Input CLK SEL Input LVCMOS Clock Input Select CLK STOP Input LVCMOS Clock Output Enable/Disable OE Input LVCMOS Output Enable/Disable (high-impedance tristate) Q08 Output LVCMOS Clock Outputs GND Supply Ground Negative Power Supply (GND) V Supply V Positive power supply for I/O and core. All V pins must be connected to the CC CC CC positive power supply for correct operation REVISION 9 3/15/16 2 2016 Integrated Device Technology, Inc. GND GND CLK SEL Q3 V CCLK0 CC Q4 CCLK1 GND CLK STOP Q5 OE V V CC CC GND GND