DATASHEET X9258 FN8168 Rev 6.00 Low Noise/Low Power/2-Wire Bus/256 Taps Quad Digital Controlled December 15, 2011 Potentiometers (XDCP) The X9258 integrates 4 digitally controlled potentiometers Features (XDCP) on a monolithic CMOS integrated circuit. Four potentiometers in one package The digitally controlled potentiometer is implemented using 256 resistor taps/potentiometer................. 0.4% resolution 255 resistive elements in a series array. Between each element are tap points connected to the wiper terminal 2-wire serial interface through switches. The position of the wiper on the array is Wiper resistance, 40 typical V+ = 5V, V- = -5V controlled by the user through the 2-wire bus interface. Each Four nonvolatile data registers for each potentiometer potentiometer has associated with it a volatile Wiper Counter Register (WCR) and 4 non-volatile Data Registers Nonvolatile storage of wiper position (DR0:DR3) that can be directly written to and read by the Standby current <5A max (total package) user. The contents of the WCR controls the position of the wiper on the resistor array though the switches. Power-up Power supplies recalls the contents of DR0 to the WCR. -V = 2.7V to 5.5V CC - V+ = 2.7V to 5.5V The XDCP can be used as a three-terminal potentiometer - V- = -2.7V to -5.5V or as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and 100k, 50ktotal potentiometer resistance signal processing. High reliability - Endurance: 100,000 data changes per bit per register - Register data retention 100 years 24 Ld SOIC, 24 Ld TSSOP Dual supply version of X9259 Pb-free (RoHS compliant) Block Diagram POT 0 V CC V R R V /R SS R R 0 1 H0 H0 0 1 WIPER WIPER V /R H2 H2 V+ RESISTOR COUNTER COUNTER ARRAY V- REGISTER REGISTER POT 2 (WCR) V /R (WCR) L0 L0 R R R R 2 3 WP 2 3 V /R L2 L2 V /R SCL W0 W0 V /R W2 W2 SDA INTERFACE AND A0 CONTROL A1 8 CIRCUITRY A2 A3 V /R W1 W1 DATA V /R W3 W3 R R 0 1 V /R R R WIPER H1 H1 0 1 V /R WIPER RESISTOR H3 H3 RESISTOR COUNTER ARRAY COUNTER ARRAY REGISTER REGISTER POT 1 POT 3 (WCR) R R (WCR) 2 3 V /R R R L1 L1 2 3 V /R L3 L3 FN8168 Rev 6.00 Page 1 of 19 December 15, 2011X9258 X9258 Ordering Information POTENTIOMETER TEMPERATURE PART NUMBER PART V LIMITS ORGANIZATION RANGE PACKAGE PKG. CC (Note 2) MARKING (V) (k) (C) (Pb-free) DWG. X9258US24Z (Note 1) X9258US Z 5 10 50 0 to +70 24 Ld SOIC (300 mil) M24.3 X9258US24IZ (Note 1) X9258US ZI -40 to +85 24 Ld SOIC (300 mil) M24.3 X9258UV24IZ X9258UV ZI -40 to +85 24 Ld TSSOP (4.4mm) MDP0044 X9258TS24Z X9258TS Z 100 0 to +70 24 Ld SOIC (300 mil) M24.3 X9258TS24IZ (Note 1) X9258TS ZI -40 to +85 24 Ld SOIC (300 mil) M24.3 X9258US24Z-2.7 (Note 1) X9258US ZF 2.7 to 5.5 50 0 to +70 24 Ld SOIC (300 mil) M24.3 X9258US24IZ-2.7 (Note 1) X9258US ZG -40 to +85 24 Ld SOIC (300 mil) M24.3 X9258UV24IZ-2.7 X9258UV ZG -40 to +85 24 Ld TSSOP (4.4mm) MDP0044 X9258TS24Z-2.7 (Note 1) X9258TS ZF 100 0 to +70 24 Ld SOIC (300 mil) M24.3 X9258TS24IZ-2.7 (Note 1) X9258TS ZG -40 to +85 24 Ld SOIC (300 mil) M24.3 X9258TV24IZ-2.7 X9258TV ZG -40 to +85 24 Ld TSSOP (4.4mm) MDP0044 X9258TV24Z-2.7 X9258TV ZF 0 to +70 24 Ld TSSOP (4.4mm) MDP0044 NOTES: 1. Add T* suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for X9258. For more information on MSL please see tech brief TB363. FN8168 Rev 6.00 Page 2 of 19 December 15, 2011