GX3202 202 x 202 3.5Gb/s Crosspoint Switch with Trace Equalization and Output Key Features Description 202 x 202 crosspoint switch architecture supporting The GX3202 is a low-power, high-speed 202 x 202 broadcast and multi-cast modes crosspoint switch, with robust signal conditioning circuits for driving and receiving high-speed signals through Supports all data rates up to 3.5Gb/s backplanes. Low power consumption: 25W typical (all channels active) The device typically consumes 25W of power with all channels operational, and features sophisticated, Sophisticated, dynamic on-chip power management dynamically scalable power management. Unused control portions of the core are automatically turned off without Independent, programmable input trace equalization affecting the operation of the remaining channels. to reduce deterministic jitter (ISI) Independent, programmable output de-emphasis for The signal conditioning features of the GX3202 include driving long board traces per-input programmable equalization and per-output programmable de-emphasis. The input equalizer removes High-speed, video-optimized control for multi-format ISI jittertypically caused by PCB trace lossesby opening applications the input data eye in applications where long PCB traces Built-in system test features with on-chip PRBS are used. There are four settings available for the input generators and analyzers equalizer, allowing flexibility in adjusting the equalization 2.5V analog core voltage, 1.8V digital core voltage level on a per-input basis. Input and output voltages support either 1.2V, 1.8V or Output de-emphasis capability provides a boost of the 2.5V CML high-frequency content of the output signal, such that the JTAG-controlled boundary scan data eye remains open after passing through a long Selectable parallel/serial host interface interconnect of PCB traces and connectors. There are four 50mm x 50mm BGA (2377 ball) de-emphasis settings that can be enabled on a per-output Operating temperature range: 0C to +85C basis. Pb-free, Halogen-free, RoHS / WEEE compliant Two integrated programmable pattern generators, and two pattern checkers are provided to assist in system test and configuration. Applications The pattern generators can each be routed to any output of Large m x n cascaded routers/switch fabrics for: the device without impacting the normal operation of any Professional broadcast applications other channel. Any input can be routed to each of the Enterprise and carrier applications pattern checkers. High-speed automated test equipment The chip features eight independent strobe inputs, 10GbE and InfiniBand networks UPDATE EN 7:0 , which are used to determine the timing of the output updates. Any output can be linked to any strobe. GX3202 1 of 49 www.semtech.com Final Data Sheet Rev.3 Semtech GENDOC-056077 August 2019 Proprietary & ConfidentialP DAT TDI TCK HOST S/P SDIN SCLK P ADS 15:0 P ADD SDOUT TMS TDO RESET P R/W S CS P CS 11:0 JTAG and Boundary Parallel/Serial Interfaces and General Registers Scan Input Configuration Latch Active UPDATE EN 7:0 Configuration Latch Trace De-Emp SDI 0 /SDI 0 SDO 0 /SDO 0 EQ Input 0 Output 0 202 x 202 Differential Trace De-Emp SDI 287 /SDI 287 SDO 287 /SDO 287 Cross-point EQ Switch Matrix Input 199 Output 199 Trace EXT PG0/EXT PG0 De-Emp EQ MON0/MON0 Input 200 Output 200 Trace De-Emp MON1/MON1 EXT PG1/EXT PG1 EQ Output 201 Input 201 Programmable Pattern Checker Pattern Generator 1 & Status Monitor 1 Programmable Pattern Checker Pattern Generator 0 & Status Monitor 0 Reference Clock/Crystal Buffer REF CLK IN REF CLK OUT GX3202 Functional Block Diagram GX3202 2 of 49 www.semtech.com Final Data Sheet Rev.3 Semtech Proprietary & Confidential GENDOC-056077 August 2019