STA8089FGBTR STMicroelectronics

STA8089FG Fully integrated GPS/Galileo/GLONASS/BeiDou/QZSS receiver with embedded RF and in-package Flash Datasheet - production data 2 Controller Area Network (CAN) 2 channels ADC (10 bits) Operating condition: Main voltage regulator (V ): 1.8 V 5% INL Backup voltage (V ): 1.6 V to 4.3 V VFQFPN56 INB (7 x 7 x 1.0 mm) Digital voltage (V ): 1.0 V to 1.32 V DD RF core voltage (V ): 1.2 V 10% CC IO Ring Voltage (V ): 1.8 V 5% or ddIO 3.3 V 10% Package: VFQFPN56 (7 x 7 x 1.0 mm) 0.4 mm pitch Features Ambient temperature range: -40/+85C STMicroelectronics positioning receiver with 48 tracking channels and 2 fast acquisition Description channels supporting GPS, Galileo, GLONASS, STA8089FG belongs to Teseo III family products. BeiDou and QZSS systems The device is a single die standalone positioning ST-DRAW (Dead Reckoning Automotive Way) receiver IC working on multiple constellations supported (STA8089FGBD only) (GPS/Galileo/GLONASS/BeiDou/QZSS). Pin to pin compatible with STA8088FG The device is backward compatible with Single die standalone receiver embedding RF STA8088FG, this enables fast customer Front-End and low noise amplifier application migration. -162 dBm indoor sensitivity (tracking mode) The device is offered with a complete GNSS Fast TTFF < 1 s in Hot start and 30 s in Cold firmware which performs all GNSS operations Start including tracking, acquisition, navigation and data output with no need of external memories. High performance ARM946 MCU (up to 196 MHz) STA8089FGBD can run also TESEO-DRAW the 256 Kbyte embedded SRAM STMicroelectronics dead reckoning firmware. In-package SQI Flash Memory (16 Mbits) Real Time Clock (RTC) circuit 32-bit Watch-dog timer 3 UARTs 2 1 I C master interface 1 Synchronous Serial Port (SSP, Motorola-SPI supported) USB2.0 full speed (12 MHz) with integrated physical layer transceiver July 2017 DocID027175 Rev 8 1/34 This is information on a product in full production. www.st.comContents STA8089FG Contents 1 Overview 6 2 Pin description . 7 2.1 Block diagram . 7 2.2 VFQFPN56 pin configuration 8 2.3 Power supply pins . 9 2.4 Main function pins 10 2.5 Test/emulated dedicated pins 10 2.6 Communication interface pins 11 2.7 General purpose pins 13 2.8 RF front-end pins . 13 3 General description . 14 3.1 RF front end . 14 3.2 GPS/Galileo/GLONASS/BeiDou Base Band (G3BB+) processor 14 3.3 MCU Subsystem . 14 3.3.1 AHB slaves 15 3.4 APB peripherals 16 3.4.1 CAN 16 3.4.2 SSP 16 3.4.3 UART . 17 3.4.4 Flash . 17 3.4.5 MTU 18 3.4.6 WDT 18 3.4.7 GPIO . 18 3.4.8 ADC 18 3.4.9 RTC 18 4 Electrical characteristics 20 4.1 Parameter conditions 20 4.2 Minimum and maximum values 20 4.3 Typical values 20 4.4 Typical curves 20 2/34 DocID027175 Rev 8