STL7NM60N STMicroelectronics

STL7NM60N N-channel 600 V, 0.805 , 5.8 A PowerFLAT 5x5 MDmesh II Power MOSFET Features V R DSS DS(on) 7 Order code I 8 D T max. JMAX 5 (1) STL7NM60N 650 V < 0.90 5.8 A 11 4 1. The value is rated according Rthj-case 12 100% avalanche tested 1 14 Low input capacitance and gate charge Low gate input resistance PowerFLAT 5x5 Application Switching applications Description Figure 1. Internal schematic diagram D D D This device is an N-channel Power MOSFET developed using the second generation of 14 13 12 11 G Pin 1 MDmesh technology. This revolutionary Power (not connected) MOSFET associates a vertical structure to the S 2 10 S companys strip layout to yield one of the worlds Drain lowest on-resistance and gate charge. It is therefore suitable for the most demanding high S 3 9 S efficiency converters. S 4 8 S 5 6 7 D D D Top view Table 1. Device summary Order code Marking Package Packaging STL7NM60N 7NM60N PowerFLAT 5x5 Tape and reel November 2011 Doc ID 18348 Rev 2 1/13 www.st.com 13 Contents STL7NM60N Contents 1 Electrical ratings 3 2 Electrical characteristics . 4 2.1 Electrical characteristics (curves) . 6 3 Test circuits 8 4 Package mechanical data . 9 5 Revision history . 12 2/13 Doc ID 18348 Rev 2