STLVD111BFR STMicroelectronics

STLVD111 Programmable low voltage 1:10 differential LVDS clock driver Features 100ps part-to part skew 50ps bank skew Differential design Meets LVDS spec. for driver outputs and receiver inputs Reference voltage available output V BB TQFP32 Low voltage V range of 2.375V to 2.625V CC High signalling rate capability (exceeds 622MHz) Support open, short and terminated input fail- safe (low output state) STLVD111 is specifically designed, modelled and Programmable drivers power off control produced with low skew as the key goal. Optimal design and layout serve to minimize gate to gate Description skew within a device. The net result is a dependable guaranteed low skew device. The STLVD111 is a low skew programmable 1 to 10 differential LVDS driver, designed for clock The STLVD111 can be used for high performance distribution. The select signal is fanned out to 10 clock distribution in 2.5V systems with LVDS identical differential outputs. levels. Designers can take advantage of the devices performance to distribute low skew The STLVD111 is provided with a 11 bit shift clocks across the backplane or the board. register with a serial in and a Control Register. The purpose is to enable or power off each output clock channel and to select the clock input. The Order codes Temperature Part number Package Packaging range STLVD111BFR -40 to 85 C TQFP32 (Tape & Reel) 2400 parts per reel May 2007 Rev. 8 1/19 www.st.com 19 Obsolete Product(s) - Obsolete Product(s)STLVD111 Contents 1 Pin configuration . 3 2 Maximum ratings 5 3 Electrical characteristics . 6 4 Specification of control register . 8 4.1 Programmed mode (EN=1) 8 4.2 Standard mode (EN=0) . 8 5 Diagram 10 6 Package mechanical data 15 7 Revision history . 18 2/19 Obsolete Product(s) - Obsolete Product(s)