TSM1N60 N-Channel Power Enhancement Mode MOSFET V = 600V Pin assignment: DS 1. Gate I = 1A D 2. Drain R , Vgs 10V, Ids 0.6A = 8 DS (on) 3. Source General Description The TSM1N60 is used an advanced termination scheme to provide enhanced voltage-blocking capability without degrading performance over time. In addition, this advanced MOSFET is designed to withstand high energy in avalanche and commutation modes. The new energy efficient design also offers a drain- to-source diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional and safety margin against unexpected voltage transients. Features Robust high voltage termination Source to Drain diode recovery time comparable to a Avalanche energy specified discrete fast recovery diode. Diode is characterized for use in bridge circuits I and V specified at elevated temperature DSS DS(on) Block Diagram Ordering Information Part No. Packing Package TSM1N60CP Tape & Reel TO-252 TSM1N60CH Tube TO-251 o Absolute Maximum Rating (Ta = 25 C unless otherwise noted) Parameter Symbol Limit Unit Drain-Source Voltage V 600V V DS Gate-Source Voltage V 30 V GS Continuous Drain Current I 1 A D Pulsed Drain Current I 9 A DM o Maximum Power Dissipation Ta = 25C 50 P W D o o Ta > 25 C 0.4 W/ C o Operating Junction Temperature T +150 C J o Operating Junction and Storage Temperature Range T , T - 55 to +150 C J STG Single Pulse Drain to Source Avalanche Energy E 20 mJ AS (V = 100V, V =10V, I =2A, L=10mH, R =25) DD GS AS G Thermal Performance Parameter Symbol Limit Unit Lead Temperature (1/8 from case) T 10 S L o Junction to Ambient Thermal Resistance (PCB mounted) Rja 62.5 C/W Note: Surface mounted on FR4 board t<=10sec. TSM1N60 1-4 2003/12 rev. E Electrical Characteristics o Tj = 25 C, unless otherwise noted Parameter Conditions SymbolMin Typ Max Unit Static Drain-Source Breakdown Voltage V = 0V, I = 250uA BV 600 -- -- V GS D DSS Drain-Source On-State Resistance V = 10V, I = 0.6A R -- -- 8.0 GS D DS(ON) Gate Threshold Voltage V = V , I = 250uA V 2.0 -- 4.0 V DS GS D GS(TH) Zero Gate Voltage Drain Current V = 600V, V = 0V I -- -- 10 uA DS GS DSS Gate Body Leakage V = 20V, V = 0V I -- -- 100 nA GS DS GSS Forward Transconductance V 50V, I = 0.5A g -- 10 -- S DS D fs Dynamic Total Gate Charge V = 400V, I = 1.0A, Q -- 8.5 14 DS D g V = 10V nC Gate-Source Charge Q -- 1.8 -- GS gs Gate-Drain Charge Q -- 4 -- gd Turn-On Delay Time V = 300V, R = 18, t -- 8 DD L d(on) Turn-On Rise Time I = 1A, V = 10V, t -- 21 nS D GEN r R = 6 Turn-Off Delay Time G t -- 18 d(off) Turn-Off Fall Time t -- 24 f Input Capacitance V = 25V, V = 0V, C -- 210 -- DS GS iss f = 1.0MHz pF Output Capacitance C -- 28 -- oss Reverse Transfer Capacitance C -- 4.2 -- rss Source-Drain Diode Max. Diode Forward Current I -- -- 1.0 A S Diode Forward Voltage I = 1.0A, V = 0V V -- -- 1.5 V S GS SD Note: 1. pulse test: pulse width <=300uS, duty cycle <=2% 2. Negligible, Dominated by circuit inductance. TSM1N60 2-4 2003/12 rev. E