TSM1NB60 Taiwan Semiconductor N-Channel Power MOSFET 600V, 1A, 10 FEATURES KEY PERFORMANCE PARAMETERS Advanced planar process PARAMETER VALUE UNIT 100% avalanche tested V 600 V DS Low R 8 (Typ.) DS(ON) R (max) 10 DS(on) Low gate charge typical 6.1 nC (Typ.) Q 6.1 nC g Low Crss typical 4.2pF (Typ.) APPLICATION Power Supply Lighting Charger SOT-223 TO-251 (IPAK) TO-252 (DPAK) Notes: MSL 3 (Moisture Sensitivity Level) for TO-252 (D-PAK), SOT-223 per J-STD-020 ABSOLUTE MAXIMUM RATINGS (T = 25C unless otherwise noted) A PARAMETER SYMBOL IPAK/DPAK SOT-223 UNIT Drain-Source Voltage V 600 V DS Gate-Source Voltage V 30 V GS T = 25C 1 C (Note 1) Continuous Drain Current I A D T = 100C 0.7 C (Note 2) Pulsed Drain Current I 4 A DM Total Power Dissipation T = 25C P 39 2.1 W C DTOT (Note 3) Single Pulsed Avalanche Energy E 5 mJ AS (Note 3) Single Pulsed Avalanche Current I 1 A AS (Note 4) Peak Diode Recovery dv/dt dv/dt 4.5 V/ns Operating Junction and Storage Temperature Range T , T - 55 to +150 C J STG THERMAL PERFORMANCE PARAMETER SYMBOL IPAK/DPAK SOT-223 UNIT Junction to Case Thermal Resistance R C/W JC 2.87 -- Junction to Ambient Thermal Resistance R C/W 110 60 JA Notes: R is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined JA at the solder mounting surface of the drain pins. R is guaranteed by design while R is determined by the users board JA CA design. R shown below for single device operation on FR-4 PCB in still air. JA Document Number: DS P0000038 1 Version: D1706 TSM1NB60 Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (T = 25C unless otherwise noted) A PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT (Note 5) Static Drain-Source Breakdown Voltage V = 0V, I = 250A BV 600 -- -- V GS D DSS Drain-Source On-State Resistance V = 10V, I = 0.5A R -- 8 10 GS D DS(ON) Gate Threshold Voltage V = V , I = 250A V 2.5 3.5 4.5 V DS GS D GS(TH) Zero Gate Voltage Drain Current V = 600V, V = 0V I -- -- 10 A DS GS DSS Gate Body Leakage V = 30V, V = 0V I -- -- 100 nA GS DS GSS Forward Transfer Conductance V = 10V, I = 0.5A g -- 0.8 -- S DS D fs (Note 6) Dynamic Total Gate Charge Q -- 6.1 -- g V = 480V, I = 1A, DS D Gate-Source Charge Q -- 1.4 -- nC gs V = 10V GS Gate-Drain Charge Q -- 3.3 -- gd Input Capacitance C -- 138 -- iss V = 25V, V = 0V, DS GS Output Capacitance C -- 17.1 -- pF oss f = 1.0MHz Reverse Transfer Capacitance C -- 4.2 -- rss Gate Resistance F = 1MHz, open drain R -- 12.5 -- g (Note 7) Switching Turn-On Delay Time t -- 7.7 -- d(on) Turn-On Rise Time t -- -- 6.8 V = 300V, R =25 r DD G ns I = 1A, V = 10V Turn-Off Delay Time t -- 15.3 -- D GS d(off) Turn-Off Fall Time t -- 14.9 -- f (Note 5) Source-Drain Diode Diode Forward Voltage I = 1A, V = 0V V -- 0.9 1.4 V S GS SD Source Current Integral reverse diode I -- -- 1 S A In the MOSFET Source Current (Pulse) I -- -- 4 SM Notes: 1. Current limited by package. 2. Pulse width limited by the maximum junction temperature. o 3. L = 10mH, I = 1A, V = 50V, R = 25, Starting T = 25 C. AS DD G J o 4. I 1A , V BV , di/dt200A/us , Starting T = 25 C. SD DD DSS J 5. Pulse test: PW 300s, duty cycle 2%. 6. For DESIGN AID ONLY, not subject to production testing. 7. Switching time is essentially independent of operating temperature. Document Number: DS P0000038 2 Version: D1706