TSM4NC50CP Taiwan Semiconductor N-Channel Power MOSFET 500V, 4A, 2.7 FEATURES KEY PERFORMANCE PARAMETERS 100% UIS and Rg tested PARAMETER VALUE UNIT Advanced planar process V 500 V DS Compliant to RoHS Directive 2011/65/EU and in R (max) 2.7 DS(on) accordance to WEEE 2002/96/EC Halogen-free according to IEC 61249-2-21 Q 12 nC g APPLICATIONS AC/DC LED Lighting Power Supply Charger TO-252 (DPAK) Notes: MSL 3 (Moisture Sensitivity Level) per J-STD-020 ABSOLUTE MAXIMUM RATINGS (T = 25C unless otherwise noted) A PARAMETER SYMBOL Limit UNIT Drain-Source Voltage V 500 V DS Gate-Source Voltage V 20 V GS T = 25C 4 C (Note 1) Continuous Drain Current I A D T = 100C 2.5 C (Note 2) Pulsed Drain Current I 16 A DM 83 Total Power Dissipation T = 25C P W C DTOT (Note 3) 78.4 mJ Single Pulse Avalanche Energy E AS (Note 3) 2.8 A Single Pulse Avalanche Current I AS - 55 to +150 C Operating Junction and Storage Temperature Range T , T J STG THERMAL PERFORMANCE PARAMETER SYMBOL Limit UNIT Junction to Case Thermal Resistance R 1.5 C/W JC Junction to Ambient Thermal Resistance R 62 C/W JA Thermal Performance Note: R is the sum of the junction-to-case and case-to-ambient thermal resistances. The case- JA thermal reference is defined at the solder mounting surface of the drain pins. R is guaranteed by design while R is JA CA determined by the users board design. R shown below for single device operation on FR-4 PCB in still air. JA 1 Version: A1609 TSM4NC50CP Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (T = 25C unless otherwise noted) A PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT Static Drain-Source Breakdown Voltage V = 0V, I = 250A BV 500 -- -- V GS D DSS Gate Threshold Voltage V = V , I = 250A V 2 2.2 3 DS GS D GS(TH) V Gate Body Leakage V = 20V, V = 0V I -- -- 100 nA GS DS GSS Zero Gate Voltage Drain Current V = 500V, V = 0V I -- -- 1 DS GS DSS A Drain-Source On-State Resistance -- 2.4 2.7 V = 10V, I =1.7A R GS D DS(on) (Note 4) (Note 5) Dynamic Total Gate Charge Q -- 12 -- g V = 400V, I = 3.4A, DS D Gate-Source Charge Q -- 2.2 -- nC gs V = 10V GS 4.4 Gate-Drain Charge Q -- -- gd Input Capacitance C -- 453 -- iss V = 50V, V = 0V, DS GS Output Capacitance C -- 27 -- oss pF f = 1.0MHz Reverse Transfer Capacitance C -- 1 -- rss Gate Resistance f = 1.0MHz R -- 2.6 5.2 g (Note 6) Switching 5.4 Turn-On Delay Time t -- -- d(on) Turn-On Rise Time t -- 18.4 -- r V = 250V, R = 5, DD G ns Turn-Off Delay Time I = 3.4A, V = 10V t -- 12.4 -- D GS d(off) Turn-Off Fall Time t -- 19.6 -- f Source-Drain Diode (Note 4) Forward Voltage -- -- 1.3 V I = 3.4A, V = 0V V S GS SD Reverse Recovery Time -- 233 -- ns t rr I = 3.4A S Reverse Recovery Charge -- 0.84 -- C dI /dt = 100A/s Q F rr Notes: 1. Current limited by package 2. Pulse width limited by the maximum junction temperature o 3. L = 20mH, I = 2.8A, V = 50V, R = 25, Starting T = 25 C AS DD G J 4. Pulse test: PW 300s, duty cycle 2% 5. For DESIGN AID ONLY, not subject to production testing. 6. Switching time is essentially independent of operating temperature. ORDERING INFORMATION PART NO. PACKAGE PACKING TSM4NC50CP ROG TO-252 (DPAK) 2,500pcs / 13 Reel 2 Version: A1609