74HCT245D(BJ) Toshiba

74HCT245D CMOS Digital Integrated Circuits Silicon Monolithic 74HCT245D74HCT245D74HCT245D74HCT245D 1. 1. Functional DescriptionFunctional Description 1. 1. Functional DescriptionFunctional Description Octal Bus Transceiver 2. 2. 2. 2. GeneralGeneralGeneralGeneral The 74HCT245D is high speed CMOS OCTAL BUS TRANSCEIVER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Its inputs are compatible with TTL, NMOS, and CMOS output voltage levels. It is intended for two-way asynchronous communication between data busses. The direction of data transmission is determined by the level of the DIR input. The enable input (G) can be used to disable the device so that the busses are effectively isolated. All inputs are equipped with protection circuits against static discharge or transient excess voltage. 3. 3. Features (Note)Features (Note) 3. 3. Features (Note)Features (Note) (1) High speed: t = 11 ns (typ.) at V = 5.5 V pd CC (2) Low power dissipation: I = 4.0 A (max) at T = 25 CC a (3) Compatible with TTL outputs: V = 0.8 V(max) IL V = 2.0 V(min) IH (4) Wide interfacing ability: LSTTL, NMOS, CMOS (5) Balanced propagation delays: t t PLH PHL Note: Do not apply a signal to any bus pins when it is in the output mode. Damage may result. All floating (high impedance) bus pins must have their input levels fixed by means of pull-up or pull-down resistors. 4. 4. 4. 4. PackagingPackagingPackagingPackaging SOIC20 Start of commercial production 2016-04 2016 Toshiba Corporation 2016-08-05 1 Rev.3.074HCT245D 5. 5. 5. 5. Pin AssignmentPin AssignmentPin AssignmentPin Assignment 6. 6. 6. 6. MarkingMarkingMarkingMarking 2016 Toshiba Corporation 2016-08-05 2 Rev.3.0