74VHCT125AFT,74VHCT126AFT
CMOS Digital Integrated Circuits Silicon Monolithic
74VHCT125AFT,74VHCT126AFT74VHCT125AFT,74VHCT126AFT74VHCT125AFT,74VHCT126AFT74VHCT125AFT,74VHCT126AFT
1. 1. Functional DescriptionFunctional Description
1. 1. Functional DescriptionFunctional Description
Quad Bus Buffer, Non-Inverted 3-State Outputs
74VHCT125AFT:QUAD BUS BUFFER
74VHCT126AFT:QUAD BUS BUFFER
2. 2. 2. 2. GeneralGeneralGeneralGeneral
The 74VHCT125AFT and 74VHCT126AFT are high speed CMOS QUAD BUS BUFFERs fabricated with silicon
gate C2MOS technology.
They achieve the high speed operation similar to equivalent Bipolar Shottky TTL while maintaining the CMOS
low power dissipation.
The 74VHCT125AFT requires the 3-state control input G to be set high to place the output into the high impedance
state, whereas the 74VHCT126AFT requires the control input G to be set low to place the output into high
impedance.
The input voltage are compatible with TTL output voltage.
This device may be used as a level converter for interfacing 3.3 V to 5 V system.
Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without
regard to the supply voltage. There structure prevents device destruction due to mismatched supply and input/
output voltages such as battery back up, hot board insertion, etc.
Note: Output in off-state
3. 3. FeaturesFeatures
3. 3. FeaturesFeatures
(1) AEC-Q100 (Grade 1) qualified. (Note 1)
(2) Wide operating temperature range: T = -40 to 125
opr
(3) High speed: Propagation delay time = 3.8 ns (typ.) at V = 5 V
CC
(4) Quiescent supply current: I = 4 A (max) at T = 25
CC a
(5) Compatible with TTL input: V = 0.8 V(max)
IL
V = 2.0 V(min)
IH
(6) Power down protection is provided on all inputs and outputs.
(7) Balanced propagation delays: t t
PLH PHL
(8) Low noise: V = 0.8 V (max)
OLP
(9) Pin and function compatible with the 74 series
(ACT/HCT/AHCT etc.) 125/126 type.
Note 1: For detail information, Please contact to our sales.
Start of commercial production
2013-01
2015-04-08
1
Rev.3.074VHCT125AFT,74VHCT126AFT
4. 4. 4. 4. PackagingPackagingPackagingPackaging
TSSOP14B
5. Pin Assignment
5. 5. 5. Pin AssignmentPin AssignmentPin Assignment
74VHCT125AFT 74VHCT126AFT
6. Marking
6. 6. 6. MarkingMarkingMarking
74VHCT125AFT 74VHCT126AFT
7. 7. 7. 7. IEC Logic SymbolIEC Logic SymbolIEC Logic SymbolIEC Logic Symbol
74VHCT125AFT 74VHCT126AFT
2015-04-08
2
Rev.3.0