74VHCT540AFT,74VHCT541AFT CMOS Digital Integrated Circuits Silicon Monolithic 74VHCT540AFT,74VHCT541AFT74VHCT540AFT,74VHCT541AFT74VHCT540AFT,74VHCT541AFT74VHCT540AFT,74VHCT541AFT 1. 1. Functional DescriptionFunctional Description 1. 1. Functional DescriptionFunctional Description Octal Bus Buffer 74VHCT540AFT: INVERTED, 3-STATE OUTPUTS 74VHCT541AFT: NON-INVERTED, 3-STATE OUTPUTS 2. 2. 2. 2. GeneralGeneralGeneralGeneral The 74VHCT540AFT and 74VHCT541AFT are advanced high speed CMOS OCTAL BUS BUFFERs fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The 74VHCT540AFT is an inverting type and, the 74VHCT541AFT is a non-inverting type. When either G1 or G2 are high, the terminal outputs are in the high-impedance state. The input voltage are compatible with TTL output voltage. These devices may be used as a level converter for interfacing 3.3 V to 5 V system. Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc. Note: Output in off-state 3. 3. FeaturesFeatures 3. 3. FeaturesFeatures (1) AEC-Q100 (Rev. H) (Note 1) (2) Wide operating temperature range: T = -40 to 125 opr (3) High speed: Propagation delay time = 5.4 ns (typ.) at V = 5.0 V CC (4) Quiescent supply current: I = 4.0 A (max) at T = 25 CC a (5) Compatible with TTL input: V = 0.8 V (max) IL V = 2.0 V (min) IH (6) Power down protection is provided on all inputs and outputs. (7) Balanced propagation delays: t t PLH PHL (8) Low noise: V = 1.5 V (max) OLP (9) Pin and function compatible with the 74 series (ACT/HCT/AHCT etc.) 540/541 type. Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales representative. Start of commercial production 2013-01 2017 Toshiba Corporation 2017-02-23 1 Rev.4.074VHCT540AFT,74VHCT541AFT 4. 4. 4. 4. PackagingPackagingPackagingPackaging TSSOP20B 5. 5. 5. 5. Pin AssignmentPin AssignmentPin AssignmentPin Assignment 74VHCT540AFT 74VHCT541AFT 6. 6. 6. 6. MarkingMarkingMarkingMarking 74VHCT540AFT 74VHCT541AFT 2017 Toshiba Corporation 2017-02-23 2 Rev.4.0